欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F4431-I/P的Datasheet PDF文件第292页浏览型号PIC18F4431-I/P的Datasheet PDF文件第293页浏览型号PIC18F4431-I/P的Datasheet PDF文件第294页浏览型号PIC18F4431-I/P的Datasheet PDF文件第295页浏览型号PIC18F4431-I/P的Datasheet PDF文件第297页浏览型号PIC18F4431-I/P的Datasheet PDF文件第298页浏览型号PIC18F4431-I/P的Datasheet PDF文件第299页浏览型号PIC18F4431-I/P的Datasheet PDF文件第300页  
PIC18F2331/2431/4331/4431  
BTFSC  
Bit Test File, Skip if Clear  
BTFSS  
Bit Test File, Skip if Set  
Syntax:  
[ label ] BTFSC f,b[,a]  
Syntax:  
[ label ] BTFSS f,b[,a]  
Operands:  
0 f 255  
0 b 7  
a [0,1]  
Operands:  
0 f 255  
0 b < 7  
a [0,1]  
Operation:  
skip if (f<b>) = 0  
Operation:  
skip if (f<b>) = 1  
Status Affected:  
Encoding:  
None  
Status Affected:  
Encoding:  
None  
1011  
bbba  
ffff  
ffff  
1010  
bbba  
ffff  
ffff  
Description:  
If bit ‘b’ in register, ‘f’, is ‘0’, then the next  
instruction is skipped.  
Description:  
If bit ‘b’ in register, ‘f’, is ‘1’, then the next  
instruction is skipped.  
If bit ‘b’ is ‘0’, then the next instruction  
fetched during the current instruction  
execution is discarded, and a NOPis  
executed instead, making this a two-cycle  
instruction. If ‘a’ is ‘0’, the Access Bank  
will be selected, overriding the BSR  
value. If ‘a’ = 1, then the bank will be  
selected as per the BSR value.  
If bit ‘b’ is ‘1’, then the next instruction  
fetched during the current instruction  
execution, is discarded and a NOPis  
executed instead, making this a two-cycle  
instruction. If ‘a’ is ‘0’, the Access Bank  
will be selected, overriding the BSR  
value. If ‘a’ = 1, then the bank will be  
selected as per the BSR value.  
Words:  
Cycles:  
1
Words:  
Cycles:  
1
1(2)  
1(2)  
Note: 3 cycles if skip and followed  
by a 2-word instruction.  
Note:  
3 cycles if skip and followed  
by a 2-word instruction.  
Q Cycle Activity:  
Q1  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
Decode  
Read  
register ‘f’  
Process  
Data  
No  
operation  
Decode  
Read  
register ‘f’  
Process  
Data  
No  
operation  
If skip:  
Q1  
If skip:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
If skip and followed by 2-word instruction:  
If skip and followed by 2-word instruction:  
Q1  
Q2  
Q3  
Q4  
Q1  
Q2  
Q3  
Q4  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
Example:  
HERE  
FALSE  
TRUE  
BTFSC  
:
:
FLAG, 1  
Example:  
HERE  
FALSE  
TRUE  
BTFSS  
:
:
FLAG, 1  
Before Instruction  
PC  
Before Instruction  
PC  
=
address (HERE)  
=
address (HERE)  
After Instruction  
If FLAG<1>  
PC  
After Instruction  
If FLAG<1>  
PC  
=
=
=
=
0;  
=
=
=
=
0;  
address (TRUE)  
1;  
address (FALSE)  
address (FALSE)  
1;  
address (TRUE)  
If FLAG<1>  
PC  
If FLAG<1>  
PC  
DS39616D-page 296  
2010 Microchip Technology Inc.  
 复制成功!