PIC18F2331/2431/4331/4431
BNC
Branch if Not Carry
BNN
Branch if Not Negative
Syntax:
[ label ] BNC
-128 n 127
n
Syntax:
[ label ] BNN
-128 n 127
n
Operands:
Operation:
Operands:
Operation:
if Carry bit is ‘0’,
(PC) + 2 + 2n PC
if Negative bit is ‘0’,
(PC) + 2 + 2n PC
Status Affected:
Encoding:
None
Status Affected:
Encoding:
None
1110
0011
nnnn
nnnn
1110
0111
nnnn
nnnn
Description:
If the Carry bit is ‘0’, then the program
will branch.
Description:
If the Negative bit is ‘0’, then the
program will branch.
The 2’s complement number, ‘2n’, is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
The 2’s complement number, ‘2n’, is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
Words:
Cycles:
1
Words:
Cycles:
1
1(2)
1(2)
Q Cycle Activity:
If Jump:
Q Cycle Activity:
If Jump:
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Decode
Read literal
‘n’
Process
Data
Write to
PC
Decode
Read literal
‘n’
Process
Data
Write to
PC
No
No
No
No
No
No
No
No
operation
operation
operation
operation
operation
operation
operation
operation
If No Jump:
Q1
If No Jump:
Q1
Q2
Q3
Q4
Q2
Q3
Q4
Decode
Read literal
‘n’
Process
Data
No
operation
Decode
Read literal
‘n’
Process
Data
No
operation
Example:
HERE
BNC Jump
Example:
HERE
BNN Jump
Before Instruction
Before Instruction
PC
=
address (HERE)
PC
=
address (HERE)
After Instruction
If Carry
PC
After Instruction
If Negative
PC
=
=
=
=
0;
=
=
=
=
0;
address (Jump)
1;
address (HERE + 2)
address (Jump)
1;
address (HERE + 2)
If Carry
PC
If Negative
PC
2010 Microchip Technology Inc.
DS39616D-page 293
MICROCHIP [ MICROCHIP ]
