PIC18F2331/2431/4331/4431
BCF
Bit Clear f
BN
Branch if Negative
Syntax:
[ label ] BCF f,b[,a]
Syntax:
[ label ] BN
n
Operands:
0 f 255
0 b 7
a [0,1]
Operands:
Operation:
-128 n 127
if Negative bit is ‘1’,
(PC) + 2 + 2n PC
Operation:
0 f<b>
Status Affected:
Encoding:
None
Status Affected:
Encoding:
None
1110
0110
nnnn
nnnn
1001
bbba
ffff
ffff
Description:
If the Negative bit is ‘1’, then the
Description:
Bit ‘b’ in register, ‘f’, is cleared. If ‘a’ is
‘0’, the Access Bank will be selected,
overriding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value.
program will branch.
The 2’s complement number, ‘2n’, is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
Words:
Cycles:
1
1
Words:
Cycles:
1
Q Cycle Activity:
Q1
1(2)
Q2
Q3
Q4
Q Cycle Activity:
If Jump:
Decode
Read
register ‘f’
Process
Data
Write
register ‘f’
Q1
Q2
Q3
Q4
Decode
Read literal
‘n’
Process
Data
Write to
PC
Example:
BCF
FLAG_REG, 7
Before Instruction
FLAG_REG = 0xC7
After Instruction
FLAG_REG = 0x47
No
operation
No
operation
No
operation
No
operation
If No Jump:
Q1
Q2
Q3
Q4
Decode
Read literal
‘n’
Process
Data
No
operation
Example:
HERE
BN Jump
Before Instruction
PC
=
address (HERE)
After Instruction
If Negative
PC
=
=
=
=
1;
address (Jump)
0;
address (HERE + 2)
If Negative
PC
DS39616D-page 292
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
