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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F4431-I/P的Datasheet PDF文件第290页浏览型号PIC18F4431-I/P的Datasheet PDF文件第291页浏览型号PIC18F4431-I/P的Datasheet PDF文件第292页浏览型号PIC18F4431-I/P的Datasheet PDF文件第293页浏览型号PIC18F4431-I/P的Datasheet PDF文件第295页浏览型号PIC18F4431-I/P的Datasheet PDF文件第296页浏览型号PIC18F4431-I/P的Datasheet PDF文件第297页浏览型号PIC18F4431-I/P的Datasheet PDF文件第298页  
PIC18F2331/2431/4331/4431  
BNOV  
Branch if Not Overflow  
BNZ  
Branch if Not Zero  
Syntax:  
[ label ] BNOV  
-128 n 127  
n
Syntax:  
[ label ] BNZ  
-128 n 127  
if Zero bit is ‘0’,  
n
Operands:  
Operation:  
Operands:  
Operation:  
if Overflow bit is ‘0’,  
(PC) + 2 + 2n PC  
(PC) + 2 + 2n PC  
Status Affected:  
Encoding:  
None  
Status Affected:  
Encoding:  
None  
1110  
0101  
nnnn  
nnnn  
1110  
0001  
nnnn  
nnnn  
Description:  
If the Overflow bit is ‘0’, then the  
program will branch.  
Description:  
If the Zero bit is ‘0’, then the program  
will branch.  
The 2’s complement number, ‘2n’, is  
added to the PC. Since the PC will have  
incremented to fetch the next  
instruction, the new address will be  
PC + 2 + 2n. This instruction is then a  
two-cycle instruction.  
The 2’s complement number, ‘2n’, is  
added to the PC. Since the PC will have  
incremented to fetch the next  
instruction, the new address will be  
PC + 2 + 2n. This instruction is then a  
two-cycle instruction.  
Words:  
Cycles:  
1
Words:  
Cycles:  
1
1(2)  
1(2)  
Q Cycle Activity:  
If Jump:  
Q Cycle Activity:  
If Jump:  
Q1  
Q2  
Q3  
Q4  
Q1  
Q2  
Q3  
Q4  
Decode  
Read literal  
‘n’  
Process  
Data  
Write to  
PC  
Decode  
Read literal  
‘n’  
Process  
Data  
Write to PC  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
If No Jump:  
Q1  
If No Jump:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
Decode  
Read literal  
‘n’  
Process  
Data  
No  
operation  
Decode  
Read literal  
‘n’  
Process  
Data  
No  
operation  
Example:  
HERE  
BNOV Jump  
Example:  
HERE  
BNZ Jump  
Before Instruction  
Before Instruction  
PC  
=
address (HERE)  
PC  
=
address (HERE)  
After Instruction  
If Overflow  
PC  
After Instruction  
=
=
=
=
0;  
If Zero  
PC  
If Zero  
PC  
=
=
=
=
0;  
address (Jump)  
1;  
address (HERE + 2)  
address (Jump)  
1;  
address (HERE + 2)  
If Overflow  
PC  
DS39616D-page 294  
2010 Microchip Technology Inc.  
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