System Power Up and Reset Settings
Pins Sample Configuration
Table 22: Reset Configuration (Continued)
Pin
Power Rail
Configuration Function
DEV_AD[28]
VDDO_B
CLK25 Select
0 = Both CLK25_PT and CLK25_SSC are used.
1 = Only CLK25_PT is used.
NOTE: Internally pulled up to 0x1.
DEV_AD[29]
DEV_AD[30]
VDDO_B
VDDO_B
DRAM Interface Width
0 = 64/72-bits
1 = 32/40-bits
NOTE: Internally pulled to 0x0.
NAND Flash Initialization Command
Selects whether to append command 0x30 to the address cycles of the NAND
Flash initialization sequence or not. Relevant only when using the NAND Flash
initialization sequence (DEV_AD[26:25] != 0x0).
0 = Do not append command 0x30.
1 = Append command 0x30.
NOTE: Internally pulled to 0x0.
DEV_AD[31]
DEV_ALE[0]
DEV_ALE[1]
DEV_WEn[0]
VDDO_B
VDDO_C
VDDO_C
VDDO_C
VDDO_C Voltage Select
0 = 1.8V
1 = 3.3V
NOTE: Internally pulled up to 0x1.
VDDO_B Voltage Select
0 = 1.8V
1 = 3.3V
NOTE: Internally pulled up to 0x1.
VDDO_D Voltage Select
0 = 1.8V
1 = 3.3V
NOTE: Internally pulled up to 0x1.
VDD_GE Voltage Select
0 = 1.8V
1 = 3.3V
NOTE: Internally pulled down to 0x0.
Copyright © 2008 Marvell
MV-S104552-U0 Rev. D
December 6, 2008, Preliminary
Document Classification: Proprietary Information
Page 55
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
