Register Description
3.5.1.11
Offset 18h: PBN—Primary Bus Number Register (D0:F0, F2)
Offset:
Default Value: 00h
18h
Attribute: RW
Size: 8 bits
This register is used to record the bus number of the logical PCI bus segment to which the primary
interface of the bridge is connected.
Bits
Type
Reset
Description
7:0
RW
0
Primary Bus Number (PBN): This field indicates the bus number of the PCI
Express* interface. Configuration software programs the value in this register.
Any type 1 configuration cycle with a bus number less than this number will
not be accepted by this portion of the Intel® 6700PXH 64-bit PCI Hub.
3.5.1.12
Offset 19h: SCBN—Secondary Bus Number Register
(D0:F0, F2)
Offset:
Default Value: 00h
19h
Attribute: RW
Size: 8 bits
This register is used to record the bus number of the PCI bus segment to which the secondary
interface of the bridge is connected.
Bits
Type
Reset
Description
7:0
RW
0
Secondary Bus Number (SCBN): This field indicates the bus number of PCI
to which the secondary interface is connected. Any type 1 configuration cycle
matching this bus number will be translated to a type 0 configuration cycle and
run on the PCI bus.
3.5.1.13
Offset 1Ah: SBBN—Subordinate Bus Number Register
(D0:F0, F2)
Offset:
Default Value: 00h
1Ah
Attribute: RW
Size: 8 bits
This register is used to record the bus number of the highest numbered PCI bus segment which is
downstream of (or subordinate to) the bridge (Intel® 6700PXH 64-bit PCI Hub).
Bits
Type
Reset
Description
7:0
RW
0
Subordinate Bus Number (SBBN): This field indicates the highest PCI bus
number below this bridge. Any type 1 configuration cycle on the PCI Express*
interface whose bus number is greater than the secondary bus number and
less than or equal to the subordinate bus number will be run as a type 1
configuration cycle on the PCI bus.
Intel® 6700PXH 64-bit PCI Hub Datasheet
89
INTEL [ INTEL ]
