Signal Description
Note: On SMBus, there is no concept of byte enables. Therefore, the Register Number written to the
slave is assumed to be aligned to the length of the Internal Command. In other words, for a Write
Byte internal command, the Register Number specifies the byte address. For a Write DWord
internal command, the two least-significant bits of the Register Number are ignored. This is
different from PCI where the byte enables are used to indicate the byte of interest.
After all the information is set up, the SMBus master initiates one or more writes which sets up the
data to be written. The final write (End bit is set) initiates an internal configuration or memory
write. The slave interface could potentially clock stretch the last data write until the write
completes without error. If an error occurred, the SMBus interface NACKs the last write operation
just before the stop bit.
Examples of configuration writes are illustrated in Figure 2-7 to Figure 2-11. All the figures are
with PEC Enabled. When PEC is disabled, there is no PEC byte in any of the sequences and the
PEC enable bit in the command field is 0. For the definition of the diagram conventions below,
refer to the SMBus Specification, Revision 2.0.
Figure 2-7. DWord Configuration Write Protocol (SMBus Block Write, PEC Enabled)
A
Data[31:24]
Byte Count = 8
A
Bus Number
PEC
A
Device/Function
A
Reg Number[15:8]
A
Reg Number [7:0]
S
11X0_XXX
Data[23:16]
W A
Cmd = 11011110
Data[16:8]
A
CLOCK
A
A
A
Data[7:0]
A
A P
STRETCH
Figure 2-8. DWord Memory Write Protocol (SMBus Word Write, PEC Enabled)
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 10111101
Cmd = 00111101
A
A
Dest Mem
A
A
Add Offset[23:16]
Add Offset[7:0]
A
A
PEC
PEC
A P
A
P
Add Offset[15:8]
A
P
S
11X0_XXX
11X0_XXX
W
A
Cmd = 00111101
Cmd = 01111101
A
A
Data[23:16]
Data[7:0]
A
PEC
PEC
Data[31:24]
Data[15:8]
S
W
A
A
A
A
CLOCK STRETCH
A
P
Figure 2-9. Word Configuration Write Protocol (SMBus Byte Write, PEC Enabled)
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 10011000
Cmd = 00011000
A
Bus Number
A
A
PEC
PEC
A
A
P
P
Device/Function
A
A
A
P
P
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 00011000
Cmd = 00011000
A
A
A
A
PEC
PEC
Register Num[15:8]
Register Num[7:0]
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 00011000
Cmd = 01011000
A
A
A
A
A
P
Data[W:X]
Data[Y:Z]
PEC
PEC
CLOCK STRETCH
A
P
68
Intel® 6700PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
