Register Description
3.8.1.13
Offset 2Ch: SS—Subsystem Identifier Register (D0: F1, F3)
Offset:
Default Value: 00000000h
2C–2Fh
Attribute: RWOS
Size: 32 bits
This register is initialized to logic 0 by the assertion of PxPCIRST#. This register can be written
only once after PxPCIRST# deassertion.
Bits
Type
Reset
Description
31:16
15:0
RWOS
RWOS
0
0
Subsystem ID (SSID): Write once register for sub-system ID.
Subsystem Vendor ID (SSVID): Write once register for holding the
subsystem vendor ID.
3.8.1.14
3.8.1.15
Offset 34h: CAPP—Capabilities Pointer Register (D0: F1, F3)
Offset:
Default Value: 44h
34h
Attribute: RO
Size: 8 bits
Bits
Type
Reset
Description
7:0
RO
44h
Capabilities Pointer (CAPP): Indicates the presence of the PCI Express*
capability list item.
Offset 40h: ABAR—Alternate Base Address Register
(D0: F1, F3)
Offset:
Default Value: 0000h
40–41h
Attribute: RW, RO
Size: 16 bits
This register contains an alternate base address in the legacy I/OxAPIC range. This range can co-
exist with the BAR register range. This range is needed for Operating Systems that support the
legacy I/OxAPIC mapping, but do not yet support remapping the I/OxAPIC anywhere in the
4-Gbyte address space.
Bits
Type
Reset
Description
15
RW
0
Enable (EN): When set, the range FECX_YZ00 to FECX_YZFF is enabled as
an alternate access method to the I/OxAPIC registers. Bits 'XYZ' are defined
below.
14:12
11:8
RO
0
0
Reserved.
RW
Base Address [19:16] (XBAD): These bits determine the high order bits of
the I/O APIC address map. When a memory address is recognized by the
Intel® 6700PXH 64-bit PCI Hub, which matches FECX_YZ00 to FECX_YZFF,
the Intel® 6700PXH 64-bit PCI Hub will respond to the cycle and access the
internal I/O APIC.
7:4
3:0
RW
RW
0
0
Base Address [15:12] (YBAD): These bits determine the low order bits of the
I/O APIC address map. When a memory address is recognized by the Intel®
6700PXH 64-bit PCI Hub, which matches FECX_YZ00 to FECX_YZFF, the
Intel® 6700PXH 64-bit PCI Hub will respond to the cycle and access the
internal I/O APIC.
Base Address [11:8] (ZBAD): These bits determine the low order bits of the
I/O APIC address map. When a memory address is recognized by the Intel®
6700PXH 64-bit PCI Hub, which matches FECX_YZ00 to FECX_YZFF, the
Intel® 6700PXH 64-bit PCI Hub will respond to the cycle and access the
internal I/O APIC.
Intel® 6700PXH 64-bit PCI Hub Datasheet
143
INTEL [ INTEL ]
