Register Description
3.8.1.16
Offset 44h: EXP_CAPID—PCI Express* Capability Identifier
Register (D0: F1, F3)
Offset:
Default Value: 10h
44h
Attribute: RO
Size: 8 bits
Bits
Type
Reset
Description
PCI Express* Capability ID (PECID): Indicates PCI Express* capability.
7:0
RO
10h
3.8.1.17
Offset 45h: EXP_NXTP—PCI Express* Next Pointer
Register (D0: F1, F3)
Offset:
Default Value: 6Ch
45h
Attribute: RO
Size: 8 bits
Bits
Type
Reset
Description
7:0
RO
6Ch
Next Pointer (MNPTR): Points to the next capabilities list pointer, which is the
Power Management Capability Identifier Register.
3.8.1.18
Offset 46: EXP_CAP—PCI Express* Capability
Register (D0: F1, F3)
Offset:
Default Value: 0001h
46 - 47h
Attribute: RO
Size: 16 bits
This register carries the version number of the capability item and other base information contained
in the PCI Express* capability structure.
Bits
Type
Reset
Description
15:14
13:9
8
RO
RO
RO
RO
RO
0
0
Reserved.
Interrupt Message Number (IMN): Not relevant for I/OxAPIC.
Slot Implemented (SLOTI): Not relevant for I/OxAPIC.
Device/Port Type (DPT): Indicated PCI Express* end-point device.
0
7:4
0
3:0
01h
Version Number (VN): Indicates PCI Express* capability structure version
number.
144
Intel® 6700PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
