Register Description
Bits
Type
Reset
Description
1
RW
0
Memory Space Enable (MSE): Controls the I/OxAPIC's response as a target
to memory accesses on the PCI Express* interface that address the
I/OxAPIC.
0 = These transactions are master aborted on the PCI Express* interface.
1 = The Intel® 6700PXH 64-bit PCI Hub is allowed to accept cycles from PCI
to be passed to the PCI Express* interface.
0
RO
0
I/O Space Enable (IOSE): Reserved.
3.8.1.5
Offset 06h: STS—Status Register (D0: F1, F3)
Offset:
Default Value: 0010h
06–07h
Attribute: RO, RWC
Size: 16 bits
Establishes the mapping between PCI 2.3 and PCI Express* for PCI 2.3 configuration space Status
register.
Bits
Type
Reset
Description
15
RWC
0
Detected Parity Error (DPE): Indicates that a parity error was detected on
cycles targeting the I/OxAPIC.
14
RWC
0
Signaled System Error (SSE): This bit is set whenever an ERR_FATAL or
ERR_NONFATAL message is sent on a) the PCI Express* bus for data parity
errors to APIC config/memory space or b) completor abort signaled by
I/OxAPIC and the SERR enable bit (bit 8 in PCICMD) is set. This bit is also set
on error messages generated on the PCI Express* interface for errors not
specific to a function provided the SERR enable bit (bit 8 in PCICMD) is set.
13
12
11
RO
RO
RO
0
0
0
Received Master Abort (RMA): Reserved.
Received Target Abort (RTA): Reserved.
Signaled Target Abort (STA): The I/OxAPIC sets this bit when it signals a
completor abort for memory reads that are greater than a DWORD in length
10:9
RO
0
DEVSEL# Timing (DT): A value of 0 indicates that fast decode is performed
by the I/OxAPIC.
8
7
RO
RO
0
0
Master Data Parity Error (MDPE): Reserved.
Fast Back-to-Back Capable (FBC): Reserved as not fast back-to-back
capable.
6
5
RO
RO
0
0
Reserved.
66 MHz Capable (C66): A value of 1 indicates that the I/OxAPIC is 66 MHz
capable.
4
RO
RO
1
0
Capabilities List Enable (CAPE): This bit indicates that the Intel® 6700PXH
64-bit PCI Hub contains the capabilities pointer in the I/OxAPIC. Offset 34h
indicates the offset for the first entry in the linked list of capabilities.
3:0
Reserved.
140
Intel® 6700PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
