Register Description
3.8.1.3
Offset 02h: DID—Device ID Register (D0: F1, F3)
Offset:
02–03h
Attribute: RO
Size: 16 bits
Default Value: 0326h (Function 1)
0327h (Function 3)
This register contains the Device Identifiers.
Bits
Type
Reset
Description
15:0
RO
Function 1: 0326h
Function 3: 0327h
Device ID (DID). Indicates device number assigned to this
controller.
3.8.1.4
Offset 04h: CMD—Command Register (D0: F1, F3)
Offset:
Default Value: 0000h
04–05h
Attribute: RW, RO
Size: 16 bits
This register controls how the Intel® 6700PXH 64-bit PCI Hub behaves.
Bits
Type
Reset
Description
15:9
8
RO
0
0
Reserved.
RW
SERR Enable (SEE): Controls the enable for the SERR special cycle on the
PCI Express* interface. This bit, when set to 1, enables reporting of fatal and
non-fatal errors (using ERR_FATAL or ERR_NONFATAL messages on the
PCI Express* interface) for data parity errors to the I/OxAPIC
configuration/memory space.
0 = Disable special cycle.
1 = Enable special cycle.
Note that this bit does not affect the setting of the PCI Express* error bits in
the PCI Express* capability registers.
7
6
RO
0
0
Wait Cycle Control (WCC): Reserved.
RW
Parity Error Enable (PAREE): Enables checking of parity. The I/OxAPIC
function uses this bit to report data parity errors it receives on writes.
5
4
3
2
RO
RO
RO
RW
0
0
0
0
VGA Palette Snoop (VGA_PS): Does not apply to PCI Express* interface.
Hardwired to 0.
Memory Write and Invalidate (MWI): Does not apply to PCI Express*
interface. Hardwired to 0.
Special Cycle Enable (SCE): Does not apply to PCI Express* interface.
Hardwired to 0.
Bus Master Enable (BME): Controls the I/OxAPIC's ability to act as a master
on the PCI Express* bus when forwarding system bus interrupt. Note that this
bit does not stop the Intel® 6700PXH 64-bit PCI Hub from issuing completions
on the PCI Express* bus.
0 = Disable. The Intel® 6700PXH 64-bit PCI Hub does not respond to any
memory transactions on the PCI interface that target the PCI Express*
interface.
1 = Enable.
Requests other than memory or I/O requests are not controlled by this bit.
Intel® 6700PXH 64-bit PCI Hub Datasheet
139
INTEL [ INTEL ]
