Register Description
3.6.1.5
Offset 110h: ERRCOR_STS – PCI Express*
Correctable Error Status Register (D0:F0, F2)
Offset:
Default Value: 00000000h
110 – 113Fh
Attribute: RWCS, RO
Size: 32 bits
This register reports the error status of individual correctable error sources in the Intel® 6700PXH
64-bit PCI Hub. When an individual error status bit is set to a “1”, it indicates that a particular error
occurred; software may clear an error status by writing a 1 to the respective bit. Refer to Section
6.2 of the PCI Express* Base Specification, Revision 1.0a for details.
Bits
Type
Reset
Description
31:13
12
RO
0
0
Reserved.
RWCS
Replay Timer Timeout Status (RTT_STS): The Intel® 6700PXH 64-bit PCI
Hub sets this bit if a replay timer timeout happened.
11:9
8
RO
0
0
Reserved.
RWCS
REPLAY_NUM Rollover Status (RNR_STS): The Intel® 6700PXH 64-bit PCI
Hub sets this bit when the replay number rolls over from 11 to 00.
7
6
RWCS
RWCS
0
0
Bad DLLP Status (BD_STS): The Intel® 6700PXH 64-bit PCI Hub sets this bit
on CRC errors on Data Link Layer Packets (DLLP).
Bad TLP Status (BT_STS): The Intel® 6700PXH 64-bit PCI Hub sets this bit
on CRC errors on Transaction Layer Packet (TLP).
5:1
0
RO
0
0
Reserved.
RWCS
Receiver Error Status (RE_STS): The Intel® 6700PXH 64-bit PCI Hub sets
this bit when the physical layer detects a receiver error.
3.6.1.6
Offset 114h: ERRCOR_MSK – PCI Express*
Correctable Error Mask Register (D0:F0, F2)
Offset:
Default Value: 00000000h
114 – 117h
Attribute: RWS, RO
Size: 32 bits
This register controls reporting of individual correctable errors via the ERR_COR message. A
masked error (respective bit set in the mask register) is not reported to the host bridge by the Intel®
6700PXH 64-bit PCI Hub. There is a mask bit per error in the Correctable Error Status register
(offset 110h). Refer to Section 6.2 of the PCI Express* Base Specification, Revision 1.0a for
details.
Bits
Type
Reset
Description
31:13
12
RO
0
0
Reserved.
RWS
Replay Timer Timeout Mask (RTTM): The Intel® 6700PXH 64-bit PCI Hub
sets this bit if a replay timer timeout happened.
11:9
8
RO
0
0
Reserved.
RWS
Replay Number Rollover Mask (RNRM): The Intel® 6700PXH 64-bit PCI Hub
sets this bit when the replay number rolls over from 11 to 00.
7
6
RWS
RWS
0
0
Bad DLLP Mask (BDM): The Intel® 6700PXH 64-bit PCI Hub sets this bit on
CRC errors on a DLLP.
Bad TLP Mask (BTM): The Intel® 6700PXH 64-bit PCI Hub sets this bit on
CRC errors on a TLP.
Intel® 6700PXH 64-bit PCI Hub Datasheet
117
INTEL [ INTEL ]
