Electrical Specifications
Table 2-26. System Reference Clock AC Specifications (Sheet 2 of 2)
Symbol
(Absolute
Parameter
Min
Nom
Max
Unit
Figure
Notes
V
1, 10
min
Single-ended minimum voltage
-0.3
-
-
V
Undershoot)
Differential ringback voltage
threshold
3, 11
3, 11
VRB-Diff
-100
500
100
mV
ps
T
Allowed time before ringback
Stable
Notes:
1.
2.
3.
4.
Measurement taken from single ended waveform.
Rise and Fall times are measured single ended between 245 mV and 455 mV of the clock swing.
Measurement taken from differential waveform.
Measured from -150 mV to +150 mV on the differential waveform (derived from REFCLK+ minus REFLCLK). The signal must
be monotic through the measurement region for rise and fall time. The 300 mV measurement window is centred on the
differential zero crossing. See Figure 2-25
5.
6.
7.
Measured at crossing point where the instantaneous voltage value of the rising edge REFCLK+ equals the falling edge
REFCLK-. See Figure 2-26.
Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all
crossing points for this measurement. See Figure 2-26.
VHavg is the statistical average of the VH measured by the oscilloscope. The purpose of defining relative crossing point
voltages is to prevent a 250 mV Vcross with a 850 mV VH. Also this prevents the case of a 550 mV Vcross with a 660 mV VH.
See Figure 2-21.
8.
9.
Defined as the total variation of all crossing voltages of Rising REFCLK+ and falling REFCLK-. This is the maximum allowed
variance in Vcross for any particular system. See Figure 2-27.
Defined as the maximum instantaneous voltage including overshoot. See Figure 2-26.
10. Defined as the minimum instantaneous voltage including overshoot. See Figure 2-26.
11. TStable is the time the differential clock must maintain a minimum ±150 mV differential voltage after rising/falling edges
before it is allowed to droop back into the VRB ±100 mV range. See Figure 2-22.
Table 2-27. Miscellaneous GTL AC Specifications
Notes
1, 2
T# Parameter
Min
Max
Unit
Figure
Asynchronous GTL input pulse width
8
SYSCLKs
V/ns
ERROR[0]_N, ERROR[1]_N, THERMTRIP_N,
PROCHOT_N Output Edge Rate
0.7
2.3
16
1, 3
ERROR[0]_N pulse width
16
b-clocks
V/ns
MEM_THROTTLE0_N, MEM_THROTTLE1_N, Intel
TXT, RUNBIST, Input Edge Rate
0.5
FORCE_PR_N pulse width
PROCHOT_N pulse width
PWRGOOD rise time
500
500
µs
µs
2-18
2-18
20
ns
PWRGOOD, RESET_N, FORCE_PR_N, ERROR[0]_N,
ERROR[1]_N, SKTDIS_N Input Edge Rates
0.1
V/ns
2, 3, 4
5
RESET_N hold time w.r.t SYSCLK/SYSCLK_N
RESET_N pulse width while PWRGOOD is active
SYSCLK stable to PWRGOOD assertion
0.5
ns
ms
2-11
2-12
1
10
SYSCLK
ms
THERMTRIP_N assertion until Vcc, and VCCCACHE
removal
500
500
Vcc stable to PWRGOOD assertion
0.05
1
ms
ms
ms
ns
V
stable to PWRGOOD assertion
REG
V
stable to VIOPWRGOOD assertion
1
500
20
IO
VIOPWRGOOD de-assertion to V outside
io
100
specification
VIOPWRGOOD rise time
ns
PWRGOOD assertion to RESET_N de-assertion
34
ms
44
Datasheet Volume 1 of 2
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