DRAM Controller Registers (D0:F0)
Bit
Access &
Default
Description
25:22
21:18
RO
0000b
Reserved
RW
0000b
DRAM Refresh High Watermark (REFHIGHWM): When the
refresh count exceeds this level, a refresh request is launched to the
scheduler and the dref_high flag is set.
0000 = 0
0001 = 1
.......
1000 = 8
17:14
RW
0000b
DRAM Refresh Low Watermark (REFLOWWM): When the refresh
count exceeds this level, a refresh request is launched to the
scheduler and the dref_low flag is set.
0000 = 0
0001 = 1
.......
1000 = 8
13:0
RW
00110000
110000b
Refresh Counter Time Out Value (REFTIMEOUT): Program this
field with a value that will provide 7.8 us at the memory clock
frequency. At various memory clock frequencies this results in the
following values:
266 MHz -> 820h
333 MHz -> A28h
400 MHz -> C30h
Datasheet
149
INTEL [ INTEL ]
