E
INTEL StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
8
7
6
5
4
3
1
2
3
4
5
6
2
1
7
8
A
A
GND
A10
A9
A8
A3
VPEN
CE0
A12
A13
A14
A15
A16
A18
VCC
VCC
A14
A15
A16
A18
CE0
A12
A13
VPEN
A10
A9
GND
A7
B
B
C
A4
A5
A2
A7
A11
A17
A19
A20
A22
A19
A20
A22
A17
A11
A4
A5
A2
C
A6
RP#
A21
A21
RP# A8
A6
D
D
A1
CE1
CE1
A3
A1
E
F
E
F
CE2
A0
BYTE#
DQ1
DQ7
DQ6
WE#
OE#
STS
WE#
OE#
STS
DQ7
DQ6
DQ13
DQ5
BYTE#
DQ1
CE2
A0
G
H
I
G
H
I
DQ8
DQ9
DQ3
DQ11
GND
DQ12
DQ4
DQ15
DQ15
DQ14
DQ12
DQ4
DQ3
DQ8
DQ9
DQ0
DQ2
DQ13 DQ14
DQ11
DQ2
DQ0
VCC
DQ10
VCCQ
DQ5
GND(1)
GND(1)
VCCQ
GND DQ10
VCC
(1)
(1)
Bottom View - Ball Side Up
Top View
64-Mbit Intel StrataFlash™ Memory: 7.67 mm x 16.37 mm(2,4)
32-Mbit Intel StrataFlash Memory: 7.67 mm x 9.79 mm(2,3,4)
NOTES:
1. VCC (Ball I7) and GND (Ball I2) have been removed. Future generations of Intel StrataFlash memory may make use of
these missing ball locations.
2. The tolerances above indicate projected production accuracy. This product is in the design phase. The package body
width and length are subject to change dependent on final die size. Actual die size could shift these values by ± 0.1 mm
for the 64 Mbit and ± 0.2 mm for the 32 Mbit.
3. Address A22 is not included in 28F320J5.
4. Figures are not drawn to scale.
Figure 2. µBGA* Package (64 Mbit and 32 Mbit)
9
ADVANCE INFORMATION
INTEL [ INTEL ]
