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PEB2091NV5.3 参数 Datasheet PDF下载

PEB2091NV5.3图片预览
型号: PEB2091NV5.3
PDF下载: 下载PDF文件 查看货源
内容描述: 集成电路通信( ISDN Echocancellation电路) [ICs for Communications(ISDN Echocancellation Circuit)]
分类和应用: 电信集成电路综合业务数字网通信
文件页数/大小: 299 页 / 1531 K
品牌: INFINEON [ Infineon ]
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PEB 2091  
PEF 2091  
Functional Description  
reached. This is independent of mode setting. However there is a difference in reset  
duration and indication between the stand-alone mode and the microprocessor mode.  
In stand-alone mode this internal reset (POR) will be fully equivalent to the hardware  
reset generated by activating the pin RES. The duration of the reset pulse will be some  
value between 10 and 30 µs.  
The processor mode (PMODE="1") has two additional properties:  
- The POR will be given on the pin RST  
- The POR will also reset the register STCR. See "STCR-Register", page 212.  
The duration of POR in this mode will be some value between 60 and 70 ms.  
3.15  
Reset Behavior  
Several resets are provided in the IEC-Q (see chapters 3.12, 3.13 and 3.14 above). Their  
effects are summarized in Table 13.  
Definition  
The transceiver core is said to be reset if the Receiver coefficients, the awake unit, the  
Monitor Channel procedure and the state machine are reset.  
Table 13  
Reset  
Reset  
Condition  
Power-on  
Effect  
Pin RST active1)  
Power-On  
Resets the transceiver core2).  
Resets all registers in the  
microprocessor mode  
yes  
UVD  
Power  
Resets the transceiver core2).  
yes  
no  
supply drop Resets all registers in the  
microprocessor mode  
Pin RES = 0 Resets the transceiver core2).  
Resets all registers except for  
register STCR in the microprocessor  
mode  
Hardware  
Reset  
Watchdog  
Watchdog  
expired  
No internal effect  
yes  
no  
Software  
Reset  
C/I = 0001  
Resets the transceiver core  
1) Applies only in the microprocessor mode  
2) In all IOM®-2 slave modes this reset will be carried out only after the IOM®-2 clocks has been applied to the  
IEC-Q  
Semiconductor Group  
94  
Data Sheet 01.99