IBMN325164CT3
IBMN325404CT3
IBMN325804CT3
256Mb Synchronous DRAM - Die Revision B
Preliminary
Clock and Clock Enable Parameters
-75H
-75D
-75A
-260
-360
-10
Symbol
Parameter
Units Notes
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
t
t
Clock Cycle Time, CAS Latency = 3 7.5 1000 7.5 1000 7.5 1000 10 1000 10 1000 10 1000 ns
7.5 1000
CK3
CK2
Clock Cycle Time, CAS Latency = 2
—
—
10 1000 10 1000 15 1000 14 1000 ns
10 1000
Clock Access Time, CAS Latency =
3
t
t
t
t
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6
—
—
—
—
—
—
6
—
—
—
—
7
8
9
9
ns
ns
ns
ns
1
1
2
2
AC3 (A)
AC2 (A)
AC3 (B)
AC2 (B)
Clock Access Time, CAS Latency =
2
Clock Access Time, CAS Latency =
3
5.4
5.4
5.4
—
5.4
—
Clock Access Time, CAS Latency =
2
6
9
t
Clock High Pulse Width
2.5
2.5
1.5
0.8
0
—
—
2.5
2.5
1.5
0.8
0
—
—
2.5
2.5
1.5
0.8
0
—
—
3
3
—
—
—
—
10
10
3
3
—
—
—
—
10
10
3
3
—
—
—
—
10
10
ns
ns
ns
ns
ns
ns
CKH
t
Clock Low Pulse Width
CKL
CES
CEH
t
Clock Enable Set-up Time
Clock Enable Hold Time
Power down mode Entry Time
Transition Time (Rise and Fall)
—
—
—
2
2
3
t
—
—
—
1
1
1
t
7.5
10
7.5
10
7.5
10
0
0
0
SB
t
0.5
0.5
0.5
0.5
0.5
0.5
T
1. Access time is measured at 1.4V. See AC Characteristics: notes 1, 2, 3, 4, 5 and load circuit A.
2. Access time is measured at 1.4V. See AC Characteristics: notes 1, 2, 3, 6, 7 and load circuit B.
Common Parameters
-75H
-75D
-75A
-260
-360
-10
Symbol
Parameter
Units Notes
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
t
Command Setup Time
Command Hold Time
1.5
0.8
—
—
1.5
0.8
—
—
1.5
0.8
—
—
2
1
—
—
2
1
—
—
3
1
—
—
ns
ns
CS
t
CH
Address and Bank Select Set-up
Time
t
1.5
—
1.5
—
1.5
—
2
—
2
—
3
—
ns
ns
AS
t
Address and Bank Select Hold Time
RAS to CAS Delay
0.8
15
60
—
—
—
0.8
15
60
—
—
—
0.8
20
—
—
—
1
—
—
—
1
—
—
—
1
—
—
—
AH
t
20
70
20
70
28
84
ns
ns
1
1
1
1
1
RCD
t
Bank Cycle Time
67.5
RC
t
Active Command Period
Precharge Time
45 100K 45 100K 45 100K 50 100K 50 100K 56 100K ns
RAS
t
15
15
1
—
—
—
15
15
1
—
—
—
20
15
1
—
—
—
20
20
1
—
—
—
20
20
1
—
—
—
14
20
1
—
—
—
ns
ns
RP
t
t
Bank to Bank Delay Time
CAS to CAS Delay Time
RRD
CCD
CK
1. These parameters account for the number of clock cycle and depend on the operating frequency of the clock, as follows:
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).
Mode Register Set Cycle
-75H
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
15 15 15 20 20 20
-75D
-75A
-260
-360
-10
Symbol
Parameter
Units
ns
t
Mode Register Set Cycle Time
—
—
—
—
—
—
RSC
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
06K0608.F39375A
10/00
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