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IBMN325404CT3B-75H 参数 Datasheet PDF下载

IBMN325404CT3B-75H图片预览
型号: IBMN325404CT3B-75H
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 64MX4, 5.4ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 66 页 / 1699 K
品牌: IBM [ IBM ]
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IBMN325164CT3  
IBMN325804CT3  
IBMN325404CT3  
Preliminary  
256Mb Synchronous DRAM - Die Revision B  
Timing Diagrams  
Page  
AC Parameters for Write Timing............................................................................................................... 42  
AC Parameters for Read Timing (3/3/3), BL=4......................................................................................... 43  
AC Parameters for Read Timing (2/2/2), BL=2......................................................................................... 44  
AC Parameters for Read Timing (3/2/2), BL=2......................................................................................... 45  
AC Parameters for Read Timing (3/3/3), BL=2......................................................................................... 46  
Mode Register Set.................................................................................................................................... 47  
Power on Sequence and Auto Refresh (CBR) ......................................................................................... 48  
Clock Suspension / DQM During Burst Read .......................................................................................... 49  
Clock Suspension / DQM During Burst Write .......................................................................................... 50  
Power Down Mode and Clock Suspend................................................................................................... 51  
Auto Refresh (CBR).................................................................................................................................. 52  
Self Refresh (Entry and Exit).................................................................................................................... 53  
Random Row Read (Interleaving Banks) with Precharge, BL=8.............................................................. 54  
Random Row Read (Interleaving Banks) with Auto-precharge, BL=8...................................................... 55  
Random Row Write (Interleaving Banks) with Auto-Precharge, BL=8 ..................................................... 56  
Random Row Write (Interleaving Banks) with Precharge, BL=8.............................................................. 57  
Read/Write Cycle  
................................................................................................................................ 58  
Interleaved Column Read Cycle............................................................................................................... 59  
Auto Precharge after a Read Burst, BL=4................................................................................................ 60  
Auto Precharge after a Write Burst, BL=4 ................................................................................................ 61  
Burst Read and Single Write Operation ................................................................................................... 62  
CS Function (Only CS signal needs to be asserted at minimum rate) ..................................................... 63  
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
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