IBM3009K2672
IBM SONET/SDH Framer
GPP Interface Pin Descriptions (Sheet 2 of 2)
Pin Name
Pin No.
I/O
Type
Pin Description
Data Acknowledge [DTACK] (Motorola Mode) or Ready [RDY] (Intel
Mode): (Active low)
Tri-state acknowledge signal.
For either Intel or Motorola mode this signal is asserted low to tell the
GPDTACK, GPRDY
Y12
O (T)
LVTTL-5sp
external microprocessor that it can end the bus cycle. An external 1-3 kΩ
pull-up resistor is required for this pin to ensure that the GPDTACK
,
GPRDY pin is pulled to its inactive state in a timely manner in order to
avoid functional problems.
SONET/SDH framer Chip Select:
GPSEL
GPINT
AB13
W15
I
LVTTL-5sp
LVTTL-5sp
Enable signal used to validate the address bus for read and write transfers
to this particular SONET/SDH framer.
Interrupt:
Interrupt to microprocessor. For either Intel or Motorola mode, GPINT is an
active low output. In the inactive state this output is tri-stated. An external
1-3 kΩ pull-up resistor is required for this pin to ensure that the GPINT pin
is pulled to its inactive state in a timely manner in order to avoid functional
problems.
O (T)
Interface Mode:
Selects the mode of operation of the microprocessor interface.
INTFMODE is set high for synchronous mode.
INTFMODE is set low for asynchronous mode.
INTFMODE
AD19
W13
I
I
LVTTL-5sd
LVTTL-5sd
Interface Select:
Selects the type of microprocessor interface.
INTFSELECT is set high for the Intel microprocessor interface.
INTFSELECT is set low for the Motorola microprocessor interface.
INTFSELECT
ssframer.01
8/27/99
Pin Information
Page 43 of 279
IBM [ IBM ]
