IBM3009K2672
IBM SONET/SDH Framer
Telecom Bus Interface Pin Descriptions (Sheet 6 of 6)
Pin Name
Pin No.
I/O
Type
Pin Description1
Telecom Bus 3 Receive Parity Signal:
Parity for the receive signals of Telecom Bus 3. It is calculated by the
SONET/SDH framer according to the settings of the PFULL3, PEVEN3,
and PENA3 control bits.
RXTB3PAR
AC01
O (T)
LVTTL-5s
Telecom Bus 3 Receive Failure Indication:
RXTB3FAIL goes high when the SONET/SDH framer detects errors that
would cause an AIS-P to be generated in the receive STM-1 #3 /STS-3c #3
signal. These alarms are: Loss of Pointer, or Path AIS, or Line AIS detected
in STM-1 #3/STS-3c #3, or Loss of Clock or Loss of Data detected at the
SONET/SDH framer’s receive inputs. RXTB3FAIL will stay active as long
as the failure condition exists.
RXTB3FAIL
AC02
O (T)
LVTTL-5s
LVTTL-5s
RXTB4DATA(7)
RXTB4DATA(6)
RXTB4DATA(5)
RXTB4DATA(4)
RXTB4DATA(3)
RXTB4DATA(2)
RXTB4DATA(1)
RXTB4DATA(0)
AD01
AE02
AD02
AE03
AD03
AC03
AE04
AD04
Telecom Bus 4 Receive Data:
SPE and TOH data from STM-1 #4/STS-3c #4 are output on these pins.
Bit 7 is the MSB and was received first. Bit 0 is the LSB and was received
last. All TOH and SPE data are passed out of the SONET/SDH framer and
are not modified. The data on these pins is clocked out of the SONET/SDH
framer on either the rising or falling edge of RXTB4CLK depending on the
setting of the CKINV4 control bit.
O (T)
Telecom Bus 4 Receive Clock:
All Telecom Bus 4 receive signals are clocked out of the SONET/SDH
framer on the falling edge of RXTB4CLK when the CKINV4 control bit is set
to ’0’. If CKINV4 is set to ‘1’, the Telecom Bus 4 receive signals are clocked
out on the rising edge of RXTB4CLK. This clock is 19.44 MHz.
RXTB4CLK
AB04
O (T)
O (T)
LVTTL-5s
LVTTL-5s
Telecom Bus 4 Receive C1J1 Signal:
When the control bit C4POS is set to ‘1’, this signal identifies the first C1
byte in the RXTB4DATA(7:0) stream when RXTB4C1J1 is high and
RXTB4SPE is low, while the J1 byte in RXTB4DATA(7:0) is identified when
RXTB4C1J1 and RXTB4SPE are high. When C4POS is set to ’0’,
RXTB4C1J1 goes high only during the last A2 byte time of RXTB4DATA(7-
0).
RXTB4C1J1
AA04
Telecom Bus 4 Receive SPE Signal:
RXTB4SPE is high during the SPE bytes of RXTB4DATA(7:0). If a pointer
decrement occurs, RXTB4SPE will go high coincident with the three H3
bytes in RXTB4DATA(7-0). If a pointer increment occurs, RXTB4SPE will
go low coincident with the three SPE bytes immediately after the H3 bytes
of the RXTB4DATA(7:0) stream.
RXTB4SPE
RXTB4PAR
AB05
AA05
O (T)
O (T)
LVTTL-5s
LVTTL-5s
Telecom Bus 4 Receive Parity Signal:
Parity for the receive signals of Telecom Bus 4. It is calculated by the
SONET/SDH framer according to the settings of the PFULL4, PEVEN4,
and PENA4 control bits.
Telecom Bus 4 Receive Failure Indication:
RXTB4FAIL goes high when the SONET/SDH framer detects errors that
would cause an AIS-P to be generated in the receive STM-1 #4/STS-3c #4
signal. These alarms are: Loss of Pointer, or Path AIS, or Line AIS detected
in STM-1 4/STS-3c #4, or Loss of Clock or Loss of Data detected at the
SONET/SDH framer’s receive inputs. RXTB4FAIL will stay active as long
as the failure condition exists.
RXTB4FAIL
Y06
O (T)
LVTTL-5s
1. When STM-4c or STS-12c frames are processed, the four transmit and four receive Telecom Buses operate in parallel as two 32-
bit wide Telecom Buses.
ssframer.01
8/27/99
Pin Information
Page 41 of 279
IBM [ IBM ]
