Preliminary
CPC710 PCI Bridge and Memory Controller Data Sheet
Signal Functional Description (Part 6 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up
3. Must pull down
4. If not used, must pull up
5. If not used, must pull down
6. Strapping input during reset; pull-up or pull-down required
Signal
P_RST
Name
PCI-32 Bus Reset.
Description
I/OType
Notes
5V tolerant
3.3V PCI
O
PCI-32 System Parity Error. Reports parity errors on address,
special cycle data, or systems.
5V tolerant
3.3V PCI
P_SERR
P_STOP
P_TRDY
I/O
I/O
Stop. Asserted by the target to request the master to stop current
transaction.
5V tolerant
3.3V PCI
5V tolerant
3.3V PCI
Target Ready. Asserted by the target when ready to receive data.
Main clock input for the PCI-32 bit bridge (maximum 33 MHz).
I/O
I
PCI_CLK
3.3V LVTTL
1
PCI-64 Interface
G_ACK64
Acknowledge 64-bit transfer.
I/O
I/O
3.3V PCI
32-bit Multiplexed Address/Data Higher Part. In the address
phase when G_REQ64 is asserted, these bits are the upper part
of the 64 bit address AD63:00. During data phase an additional
32-bits of data are transferred when G_REQ64 and G_ACK64 are
both asserted.
G_ADH31:00
3.3V PCI
32-bit Multiplexed Address/Data Lower Part. A write operation is
defined as the transfer of data from the PCI bus master to a PCI
slave device on the PCI Bus.
G_ADL31:00
G_ARB
I/O
O
3.3V PCI
Arbiter. Asserted when the CPC710 is the PCI-64 arbiter. Can be
converted to a Chip Data Mask (SDDQM) by setting bit 15 of the
SDRAM0_MCCR register.
3.3V LVTTL
G_CBE7:0
G_DEVSEL
G_FRAME
Bus Command/Byte Enable.
Device Select.
I/O
I/O
I/O
3.3V PCI
3.3V PCI
3.3V PCI
Cycle Frame
G_GNT0:4
5V tolerant
3.3V PCI
Bus Grants.
O
I
G_GNT5:7[P_GNT4:6]
Initialization Device Select. Used as chip select during
configuration.
G_IDSEL
3.3V PCI
5V tolerant
3.3V PCI
G_INTA:D
G_IRDY
Interrupts A:D.
Initiator Ready
O
2
I/O
3.3V PCI
Lock. Used to establish, maintain and release resource locks on
PCI-64. Reserved for future usage. It is recommended to tie up
this signal.
G_LOCK
I
3.3V PCI
G_PAR
Parity bit.
I/O
I/O
I/O
3.3V PCI
3.3V PCI
3.3V PCI
G_PAR64
G_PERR
Parity upper double word.
Data Parity Error.
41
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