IBM11N1645L
IBM11N1735Q
1M x 64/72 DRAM Module
Write Cycle
-60
-6R
-70
Symbol
Parameter
Unit
Notes
1
Min
0
Max
—
Min
0
Max
—
Min
0
Max
—
tWCS
tWCH
tWP
Write Command Set Up Time
Write Command Hold Time
Write Command Pulse Width
Write Command to RAS Lead Time
Write Command to CAS Lead Time
DIN Setup Time
ns
ns
ns
ns
ns
ns
ns
10
10
10
10
0
—
10
10
10
10
0
—
12
12
12
12
0
—
—
—
—
tRWL
tCWL
tDS
—
—
—
—
—
—
—
—
—
2
2
tDH
DIN Hold Time
10
—
10
—
12
—
1. tWCS, tRWD, tCWD, and tAWD are not restrictive parameters. They are included in the data sheet as electrical characteristics only. If
WCS ≥ tWCS(min.), the entire cycle is an early write cycle and the data pin will remain open circuit (high impedance) through the
t
entire cycle; If tRWD ≥ tRWD(min.), tCWD ≥ tCWD(min.) and tAWD ≥ tAWD(min.), the cycle is a Read-Modify-Write cycle and the data will
contain read from the selected cell: If neither of the above sets of conditions are met, the condition of the data (at access time) is
indeterminate.
2. Data-in set-up and hold is measured from the latter of the two timings, CAS or WE.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
50H8035
SA14-4630-02
Revised 5/96
Page 9 of 33
IBM [ IBM ]
