IBM11N1645L
IBM11N1735Q
1M x 64/72 DRAM Module
Read Cycle
-60
-6R
-70
Symbol
Parameter
Unit
Notes
Min
—
—
—
—
0
Max
60
15
30
15
—
Min
—
—
—
—
0
Max
60
17
30
17
—
Min
—
—
—
—
0
Max
70
20
35
20
—
1, 2
1, 2
1, 2
1, 2
tRAC
tCAC
tAA
Access Time from RAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Access Time from CAS
Access Time from Address
tOEA
tRCS
tRCH
tRRH
tRAL
tCLZ
tOES
tORD
tCDD
tOEZ
tOFF
Access Time from OE
Read Command Setup Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
CAS to Output in Low-Z
3
3
0
—
0
—
0
—
0
—
0
—
0
—
30
0
—
30
0
—
35
0
—
—
—
—
OE setup time prior to CAS
5
—
5
—
5
—
OE setup time prior to RAS (Hidden Refresh)
CAS to DIN Delay Time
0
—
0
—
0
—
15
—
—
—
15
—
—
—
15
—
—
—
5
4
Output Buffer Turn-off Delay from OE
Output Buffer Turn-off Delay
15
15
15
15
15
15
4, 6
1. Measured with the specified current load and 100pF.
2. Access time is determined by the latter of tRAC, tCAC, tCPA, tAA, tOEA
.
3. Either tRCH or tRRH must be satisfied.
4. tOFF (max) and tOEZ (max) define the time at which the output achieves the open circuit condition and is not referenced to output
voltage levels.
5. Either tCDD or tODD must be satisfied.
6. tOFF is referenced from the rising edge of RAS or CAS , whichever is last.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
50H8035
SA14-4630-02
Revised 5/96
Page 10 of 33