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H5PS1G83EFR 参数 Datasheet PDF下载

H5PS1G83EFR图片预览
型号: H5PS1G83EFR
PDF下载: 下载PDF文件 查看货源
内容描述: 1GB DDR2 SDRAM [1Gb DDR2 SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 44 页 / 566 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
 浏览型号H5PS1G83EFR的Datasheet PDF文件第19页浏览型号H5PS1G83EFR的Datasheet PDF文件第20页浏览型号H5PS1G83EFR的Datasheet PDF文件第21页浏览型号H5PS1G83EFR的Datasheet PDF文件第22页浏览型号H5PS1G83EFR的Datasheet PDF文件第24页浏览型号H5PS1G83EFR的Datasheet PDF文件第25页浏览型号H5PS1G83EFR的Datasheet PDF文件第26页浏览型号H5PS1G83EFR的Datasheet PDF文件第27页  
H5PS1G43EFR  
H5PS1G83EFR  
H5PS1G63EFR  
-Continued-  
DDR2-400  
DDR2-533  
Symbol  
Units  
Notes  
Parameter  
min  
max  
min  
max  
Four Active Window for 1KB page size  
products  
ns  
ns  
tFAW  
tFAW  
37.5  
50  
-
37.5  
50  
-
Four Active Window for 2KB page size  
products  
-
-
CAS to CAS command delay  
Write recovery time  
tCCD  
tWR  
2
2
tCK  
ns  
15  
-
-
-
15  
-
-
-
Auto precharge write recovery +  
precharge time  
tDAL  
WR+tRP*  
WR+tRP*  
tCK  
14  
Internal write to read command delay  
Internal read to precharge command delay  
Exit self refresh to a non-read command  
Exit self refresh to a read command  
tWTR  
tRTP  
10  
7.5  
7.5  
7.5  
ns  
ns  
24  
3
tXSNR  
tXSRD  
tRFC + 10  
200  
tRFC + 10  
200  
ns  
-
-
-
-
tCK  
Exit precharge power down to any non-  
read command  
tXP  
2
2
2
2
tCK  
tCK  
tCK  
Exit active power down to read command  
tXARD  
tXARDS  
1
Exit active power down to read command  
(Slow exit, Lower power)  
6 - AL  
6 - AL  
1, 2  
CKE minimum pulse width  
(HIGH and LOW pulse width)  
tCKE  
tAOND  
tAON  
3
2
3
2
tCK  
tCK  
ns  
27  
16  
16  
ODT turn-on delay  
ODT turn-on  
2
2
tAC(max)  
+1  
tAC(max)  
+1  
tAC(min)  
tAC(min)  
2tCK+tAC  
(max)  
+1  
tAC(min)+  
2
tAC(min)+  
2
2tCK+tA  
C(max)+1  
ODT turn-on(Power-Down mode)  
tAONPD  
ns  
ODT turn-off delay  
ODT turn-off  
tAOFD  
tAOF  
2.5  
2.5  
2.5  
2.5  
tCK  
ns  
17,44  
17,44  
tAC(max)  
+ 0.6  
tAC(max)  
+ 0.6  
tAC(min)  
tAC(min)  
2.5tCK+t  
AC(max)  
+1  
tAC(min)+  
2
2.5tCK+tA  
C(max)+1  
tAC(min)+  
2
ODT turn-off (Power-Down mode)  
tAOFPD  
ns  
ODT to power down entry latency  
ODT power down exit latency  
OCD drive mode output delay  
tANPD  
tAXPD  
tOIT  
3
8
0
3
8
0
tCK  
tCK  
ns  
12  
12  
Minimum time clocks remains ON after  
CKE asynchronously drops LOW  
tIS+tCK+tI  
H
tIS+tCK+tI  
H
tDelay  
ns  
15  
Rev. 0.4 / Nov 2008  
23  
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