H5PS1G43EFR
H5PS1G83EFR
H5PS1G63EFR
4. Electrical Characteristics & AC Timing Specification
(T
; V
= 1.8 +/- 0.1V; V = 1.8 +/- 0.1V)
OPER
DDQ DD
Refresh Parameters by Device Density
Symbol
Parameter
256Mb 512Mb 1Gb 2Gb 4Gb Units Notes
Refresh to Active/Refresh
command time
tRFC
75
105
7.8
127.5 195 327.5
ns
us
1
1
0 ℃≤ TCASE ≤ 85℃
7.8
7.8
3.9
7.8
3.9
7.8
3.9
Average periodic
refresh interval
tREFI
85℃＜TCASE ≤ 95
℃
3.9
3.9
us
1,2
Note:
1: If refresh timing is violated, data corruption may occur and the data must be re-written with valid data before a valid READ can be
executed.
2. This is an optional feature. For detailed information, please refer to “operating temperature condition” in this data sheet.
DDR2 SDRAM speed bins and tRCD, tRP and tRC for corresponding bin
Speed
DDR2-800
DDR2-667
DDR2-533 DDR2-400 Units Notes
Parameter
min
min
6-6-6
6
min
min
5-5-5
5
min
4-4-4
4
min
3-3-3
3
Bin(CL-tRCD-tRP)
CAS Latency
tRCD
5-5-5
5
4-4-4
4
tCK
ns
12.5
12.5
45
15
12
15
15
15
2
2
tRP*1
15
12
15
15
15
ns
tRAS
45
45
57
45
45
40
ns
2,3
2
tRC
57.5
60
60
60
55
ns
Note:
1. 8 bank device Precharge All Allowance: tRP for a Precharge All command for an 8 Bank device will equal to tRP+1*tCK, where tRP
are the values for a single bank Precharge, which are shown in the table above.
2. Refer to Specific Notes 32.
3. Refer to Specific Notes 3.
Rev. 0.4 / Nov 2008
21
HYNIX [ HYNIX SEMICONDUCTOR ]
