HI-3593
FLAG / INTERRUPT ASSIGNMENT REGISTER
R2INT
R
[0
2
]
FLAG[1]
R1FLARG1F[1L]AG[0]
(Write, SPI Op-code 0x34)
(Read, SPI Op-code 0xD0)
7
6
5
4
3
2
1
0
LSB
MSB
Bit Name
R/W Default Description
7-6 R2INT[1:0]
R/W
0
The value of R2INT[1:0] defines the function of the R2INToutput pin, as follows:
00
R2INT pulses high when a valid message is received and
placed in the Receiver 2 FIFO or any of the Receiver 2 Priority-
Label mail boxes
01
10
11
R2INT pulses high when a message is received in Receiver 2
Priority-Label mail box #1
R2INT pulses high when a message is received in Receiver 2
Priority-Label mail box #2
R2INT pulses high when a message is received in Receiver 2
Priority-Label mail box #3
5-4 R2FLAG[1:0] R/W
0
The value of R2FLAG[1:0] defines the function of the R2FLAG output pin, as follows:
00
01
R2FLAG goes high when Receiver 2 FIFO is empty
R2FLAG goes high when Receiver 2 FIFO contains 32 ARINC
429 words (FIFO is full)
10
11
R2FLAG goes high when Receiver 2 FIFO contains at least
sixteen ARINC 429 words (FIFO is half-full)
R2FLAG goes high when Receiver 2 FIFO contains one or more
words (FIFO is not empty)
3-2 R1INT[1:0]
R/W
0
The value of R1INT[1:0] defines the function of the R1INT output pin, as follows:
00
R1INT pulses high when a valid message is received and
placed in the Receiver 1 FIFO or any of the Receiver 1 Priority-
Label mail boxes
01
10
11
R1INT pulses high when a message is received in Receiver 1
Priority-Label mail box #1
R1INT pulses high when a message is received in Receiver 1
Priority-Label mail box #2
R1INT pulses high when a message is received in Receiver 1
Priority-Label mail box #3
1-0 R1FLAG[1:0] R/W
0
The value of R1FLAG[1:0] defines the function of the R1FLAG output pin, as follows:
00
01
R1FLAG goes high when Receiver 1 FIFO is empty
R1FLAG goes high when Receiver 1 FIFO contains 32 ARINC
429 words (FIFO is full)
10
11
R1FLAG goes high when Receiver 1 FIFO contains at least
sixteen ARINC 429 words (FIFO is half-full)
R1FLAG goes high when Receiver 1 FIFO contains one or more
words (FIFO is not empty)
HOLT INTEGRATED CIRCUITS
7