HT46RU25/HT46CU25
Once the interrupt request flags, composed of EIF, T0F,
T1F, URIF, HIF and MFF, are set, they will remain in the
INTC0 and INTC1 registers until the interrupts are ser-
viced or cleared by a software instruction.
Interrupt Source
External Interrupt
Priority Vector
1
2
3
4
5
04H
08H
0CH
10H
14H
Timer/Event Counter 0 Overflow
Timer/Event Counter 1 Overflow
UART Bus Interrupt
It is recommended that a program does not use the
²CALL subroutine² within the interrupt subroutine. Inter-
rupts often occur in an unpredictable manner or need to
be serviced immediately in some applications. If only one
stack is left and enabling the interrupt is not well con-
trolled, the original control sequence will be damaged
once the ²CALL² operates in the interrupt subroutine.
I2C Bus Interrupt
Multi-function Interrupt
(Timer/event counter 2 / Real time
clock / Time base overflow)
6
18H
Bit No.
Label
EMI
EEI
Function
0
1
2
3
4
5
6
Controls the master (global) interrupt (1=enable; 0= disable)
Controls the external interrupt (1=enable; 0=disable)
ET0I
ET1I
EIF
Controls the Timer/Event Counter 0 interrupt (1=enable; 0=disable)
Controls the Timer/Event Counter 1 interrupt (1=enable; 0=disable)
External interrupt request flag (1=active; 0=inactive)
T0F
T1F
Internal Timer/Event Counter 0 request flag (1=active; 0=inactive)
Internal Timer/Event Counter 1 request flag (1=active; 0=inactive)
For test mode used only.
7
¾
Must be written as ²0²; otherwise may result in unpredictable operation.
INTC0 (0BH) Register
Bit No.
Label
EURI
EHI
Function
Control the UART interrupt (1=enable; 0=disable)
Control the I2C Bus interrupt (1=enable; 0=disable)
Control the Multi-function interrupt (1=enable; 0=disable)
Unused bit, read as ²0²
0
1
2
EMFI
¾
3, 7
4
URIF
HIF
UART request flag (1=active; 0=inactive)
5
I2C Bus interrupt request flag (1=active; 0=inactive)
Multi-function interrupt request flag (1=active; 0=inactive)
6
MFF
INTC1 (1EH) Register
Bit No.
Label
ET2I
ETBI
ERTI
¾
Function
Control the Timer/Event Counter 2 interrupt (1=enable; 0=disable)
Control the time base interrupt (1=enable; 0=disable)
Control the real time clock interrupt (1=enable; 0=disable)
Unused bit, read as ²0²
0
1
2
3, 7
4
T2F
Timer/Event Counter 2 interrupt request flag (1=active; 0=inactive)
Time base interrupt request flag (1=active; 0=inactive)
Real time clock interrupt request flag (1=active; 0=inactive)
MFIC (2FH) Register
5
TBF
RTF
6
Rev. 1.30
12
March 9, 2007