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    V2DIP1-48 参数 Datasheet PDF下载

    V2DIP1-48图片预览
    型号： V2DIP1-48
    PDF下载： 下载PDF文件 查看货源
    内容描述： 设计，让使用VNC2-48Q IC设计快速发展 [Designed to allow rapid development of designs using the VNC2-48Q IC]
    分类和应用：
    文件页数/大小： 25 页 / 958 K
    品牌： FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
     浏览型号V2DIP1-48的Datasheet PDF文件第1页浏览型号V2DIP1-48的Datasheet PDF文件第2页浏览型号V2DIP1-48的Datasheet PDF文件第4页浏览型号V2DIP1-48的Datasheet PDF文件第5页浏览型号V2DIP1-48的Datasheet PDF文件第6页浏览型号V2DIP1-48的Datasheet PDF文件第7页浏览型号V2DIP1-48的Datasheet PDF文件第8页浏览型号V2DIP1-48的Datasheet PDF文件第9页  
    Document Reference No.: FT_000236
    V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.01
    Clearance No.: FTDI# 153
    `
    Table of Contents
    1
    2
    3
    Introduction............................................................................................ 1
    Features ................................................................................................. 3
    Pin Out and Signal Description ............................................................ 4
    3.1
    3.2
    3.3
    3.4
    3.5
    3.5.1
    Module Pin Out .................................................................................................... 4
    Pin Signal Description ........................................................................................ 6
    I/O Configuration Using The Jumper Pin Header ............................................. 8
    Default Interface I/O Pin Configuration .............................................................. 9
    UART Interface................................................................................................... 10
    Signal Description – UART Interface
    .............................................................................. 10
    3.6
    Serial Peripheral Interface (SPI) ....................................................................... 11
    Signal Description - SPI Slave
    ........................................................................................ 11
    Signal Description - SPI Master
    ...................................................................................... 11
    3.6.1
    3.6.2
    3.7
    Parallel FIFO Interface-Asynchronous Mode .................................................. 12
    Signal Description - Parallel FIFO Interface
    ................................................................. 12
    Timing Diagram – Asynchronous FIFO Mode Read and Write Cycle
    ..................... 13
    3.7.1
    3.7.2
    3.8
    3.9
    Parallel FIFO Interface-Synchronous Mode .................................................... 14
    Timing Diagram – Synchronous FIFO Mode Read and Write Cycle
    ....................... 14
    3.8.1
    Debugger Interface ............................................................................................ 16
    Signal Description - Debugger Interface
    ...................................................................... 16
    3.9.1
    4
    Firmware .............................................................................................. 17
    4.1
    4.2
    4.3
    Firmware Support .............................................................................................. 17
    Available Firmware ............................................................................................ 17
    Firmware Upgrades ........................................................................................... 17
    5
    6
    7
    8
    External circuit Configuration ............................................................ 18
    5.1
    Adding a second USB Port ............................................................................... 18
    Mechanical Dimensions ...................................................................... 19
    Schematic Diagram ............................................................................. 20
    Contact Information............................................................................. 21
    Appendix A – References ............................................................................................ 22
    Appendix B – List of Figures and Tables ................................................................... 23
    List of Figures............................................................................................................... 23
    List of Tables ................................................................................................................ 23
    Appendix C – Revision History ................................................................................... 24
    Copyright © 2010 Future Technology Devices International Limited
    2

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