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V2DIP1-48 参数 Datasheet PDF下载

V2DIP1-48图片预览
型号: V2DIP1-48
PDF下载: 下载PDF文件 查看货源
内容描述: 设计,让使用VNC2-48Q IC设计快速发展 [Designed to allow rapid development of designs using the VNC2-48Q IC]
分类和应用:
文件页数/大小: 25 页 / 958 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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Document Reference No.: FT_000236
V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.01
Clearance No.: FTDI# 153
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3.5 UART Interface
When the data and control buses are configured in UART mode, the interface implements a standard
asynchronous serial UART port with flow control. The UART can support baud rates from 300baud to
3Mbaud. The UART interface is described more fully in a Vinculum-II datasheet please refer to:-
3.5.1
Signal Description – UART Interface
The UART signals can be programmed to a choice of I/O pin available.
explains the available
pins for each of the UART signals.
Available Pins
Name
Type
Description
J1-6, J1-11, J2-5, J2-10
J1-2, J1-8, J1-12, J2-9
J1-3, J1-9, J2-12, J2-8
J1-10, J2-11, J2-6
J1-6, J1-11, J2-5, J2-10
uart_txd
uart_rxd#
uart_rts#
uart_cts#
uart_dtr#
Output
Input
Output
Input
Output
Transmit asynchronous data output
Receive asynchronous data input
Request To Send Control Output
Clear To Send Control Input
Data Acknowledge (Data Terminal
Ready Control) Output
J1-2, J1-8, J1-12, J2-9
uart_dsr#
Input
Data Request (Data Set Ready
Control) Input
J1-3, J1-9, J2-12, J2-8
J1-10, J2-11, J2-6
uart_dcd#
uart_ri#
Input
Input
Data Carrier Detect Control Input
Ring Indicator Control Input.
uart_ri# low can be used to resume
the PC USB Host controller from
suspend.
J1-6, J1-11, J2-5, J2-10
uart_tx_active
Output
Enable Transmit Data for RS485
designs. uart_tx_active may be used
to signal that a transmit operation is
in progress.The uart_tx_active signal
will be set high one bit-time before
data is transmitted and return low
one bit time after the last bit of a
data frame has been transmitted
Table 3.4 - Data and Control Bus Signal Mode Options – UART Interface
Copyright © 2010 Future Technology Devices International Limited
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