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V2DIP1-48 参数 Datasheet PDF下载

V2DIP1-48图片预览
型号: V2DIP1-48
PDF下载: 下载PDF文件 查看货源
内容描述: 设计,让使用VNC2-48Q IC设计快速发展 [Designed to allow rapid development of designs using the VNC2-48Q IC]
分类和应用:
文件页数/大小: 25 页 / 958 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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Document Reference No.: FT_000236
V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.01
Clearance No.: FTDI# 153
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3.9 Debugger Interface
The purpose of the debugger interface is to provide access to the VNC2 silicon/firmware debugger. The
debug interface can be accessed by connecting a debug module to the J3 connector. This debug module
will give access to the debugger through a USB connection to a PC via the Integrated Development
Environment (IDE). The IDE is a graphical interface to the VNC2 software development tool-chain and
gives the following debug capabilities through the debugger interface:
Flash Erase, Write and Program.
Application debug - application code can have breakpoints, be single stepped and can be halted.
Detailed internal debug - memory and register read/write access.
The Debugger Interface, and how to use it, is further described in the following applications Note
3.9.1 Signal Description - Debugger Interface
shows the signals and pins description for the debugger interface pin header J3
Name
Pin No.
Name
On PCB
Type
Description
J3-1
J3-2
J3-3
IO0
-
GND
DBG
[Key]
GND
I/O
-
PWR
Input
Debugger Interface
Not connected. Used to make sure that the
debug module is connected correctly.
Module ground supply pin
Can be used by an external device to reset
the VNCL2. This pin is also used in
combination with PROG# and the UART
interface to program firmware into the
VNC2.
This pin is used in combination with the
RESET# pin and the UART interface to
program firmware into the VNC2.
J3-4
RESET#
RST#
J3-5
J3-6
PROG#
5V0
PRG#
VCC
Input
5.0V module supply pin. This pin can be
used to provide the 5.0V input to the
V2DIP1-48 when the V2DIP1-48 is not
powered from the USB connector (VBUS)
or the debugger interface. Also connected
to DIL connector pins J1-2, J1-3 and J1-9
and J3-6.
Table 3.11 - Signal Name and Description – Debugger Interface
PWR Input
Copyright © 2010 Future Technology Devices International Limited
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