Port Integration Module (S12PPIMV1)
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x027C
R
0
0
0
0
0
0
0
0
Reserved
W
0x027D
Reserved
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
0x027E
Reserved
R
W
0x027F
R
Reserved
W
= Unimplemented or Reserved
2.3.2
Register Descriptions
The following table summarizes the effect of the various configuration bits, i.e. data direction (DDR),
output level (IO), reduced drive (RDR), pull enable (PE), pull select (PS) on the pin function and pull
device activity.
The configuration bit PS is used for two purposes:
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pull-up or pull-down device if PE is active.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
61
FREESCALE [ Freescale ]
