Port Integration Module (S12PPIMV1)
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x0020–
0x023F
Non-PIM
Address
Range
R
W
Non-PIM Address Range
0x0240
PTT
R
PTT7
PTT6
PTT5
PTT4
PTT3
PTT2
PTT1
PTT0
W
0x0241
PTIT
R
PTIT7
PTIT6
PTIT5
PTIT4
PTIT3
PTIT2
PTIT1
PTIT0
W
0x0242
DDRT
R
DDRT7
RDRT7
PERT7
DDRT6
RDRT6
PERT6
DDRT5
RDRT5
PERT5
DDRT4
RDRT4
PERT4
DDRT3
RDRT3
PERT3
DDRT2
RDRT2
PERT2
DDRT1
RDRT1
PERT1
DDRT0
RDRT0
PERT0
W
0x0243
RDRT
R
W
0x0244
PERT
R
W
0x0245
PPST
R
PPST7
0
PPST6
0
PPST5
0
PPST4
0
PPST3
0
PPST2
0
PPST1
0
PPST0
0
W
0x0246
R
Reserved
W
0x0247
PTTRR
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PTTRR5
0
PTTRR4
0
PTTRR0
W
0x0248
PTS
R
PTS3
PTS2
PTS1
PTS0
W
0x0249
PTIS
R
0
0
0
0
0
0
0
0
0
0
PTIS3
PTIS2
PTIS1
PTIS0
W
0x024A
DDRS
R
DDRS3
RDRS3
PERS3
PPSS3
DDRS2
RDRS2
PERS2
PPSS2
DDRS1
RDRS1
PERS1
PPSS1
DDRS0
RDRS0
PERS0
PPSS0
W
0x024B
RDRS
R
W
0x024C
PERS
R
W
0x024D
PPSS
R
W
= Unimplemented or Reserved
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
57
FREESCALE [ Freescale ]
