Port Integration Module (S12PPIMV1)
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x025E
PIEP
R
0
PIEP7
PIEP5
PIEP4
PIEP3
PIEP2
PIEP1
PIEP0
W
0x025F
PIFP
R
0
0
0
0
0
0
0
0
0
PIFP7
0
PIFP5
0
PIFP4
0
PIFP3
0
PIFP2
0
PIFP1
0
PIFP0
0
W
0x0260
Reserved
R
W
0x0261
Reserved
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
0x0262
Reserved
R
W
0x0263
Reserved
R
W
0x0264
Reserved
R
W
0x0265
Reserved
R
W
0x0266
Reserved
R
W
0x0267
Reserved
R
W
0x0268
PTJ
R
PTJ7
PTJ6
PTJ2
PTJ1
PTJ0
W
0x0269
PTIJ
R
PTIJ7
PTIJ6
PTIJ2
PTIJ1
PTIJ0
W
0x026A
DDRJ
R
DDRJ7
RDRJ7
PERJ7
DDRJ6
RDRJ6
PERJ6
DDRJ2
RDRJ2
PERJ2
DDRJ1
RDRJ1
PERJ1
DDRJ0
RDRJ0
PERJ0
W
0x026B
RDRJ
R
W
0x026C
PERJ
R
W
= Unimplemented or Reserved
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
59
FREESCALE [ Freescale ]
