Port Integration Module (S12PPIMV1)
2.3.3
Port A Data Register (PORTA)
Address 0x0000
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-1. Port A Data Register (PORTA)
1. Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Table 2-4. PORTA Register Field Descriptions
Field
Description
Port A general purpose input/output data—Data Register
7-0
PA
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
2.3.4
Port B Data Register (PORTB)
Address 0x0001
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-2. Port B Data Register (PORTB)
1. Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Table 2-5. PORTB Register Field Descriptions
Field
Description
Port B general purpose input/output data—Data Register
7-0
PB
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
63
FREESCALE [ Freescale ]
