Port Integration Module (S12PPIMV1)
Register
Bit 7
6
5
4
3
2
1
Bit 0
Name
0x0004
Reserved
R
0
0
0
0
0
0
0
0
0
0
0
W
0x0005
Reserved
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
0x0006
Reserved
R
W
0x0007
R
0
0
Reserved
W
0x0008
PORTE
R
PE1
0
PE0
0
PE7
PE6
PE5
PE4
PE3
PE2
W
0x0009
DDRE
R
DDRE7
DDRE6
DDRE5
DDRE4
DDRE3
DDRE2
W
0x000A
0x000B
Non-PIM
Address
Range
R
W
Non-PIM Address Range
0x000C
PUCR
R
0
0
0
0
0
0
0
BKPUE
0
PUPEE
PUPBE
RDPB
PUPAE
RDPA
W
0x000D
RDRIV
R
0
RDPE
W
0x000E–
0x001B
Non-PIM
Address
Range
R
W
Non-PIM Address Range
0x001C
ECLKCTL
R
NECLK
0
NCLKX2
0
DIV16
0
EDIV4
0
EDIV3
0
EDIV2
0
EDIV1
0
EDIV0
0
W
0x001D
R
Reserved
W
0x001E
IRQCR
R
0
0
0
0
0
0
0
0
0
0
0
0
IRQE
0
IRQEN
0
W
0x001F
R
Reserved
W
= Unimplemented or Reserved
S12P-Family Reference Manual, Rev. 1.13
56
Freescale Semiconductor
FREESCALE [ Freescale ]
