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MC908MR32CFUE 参数 Datasheet PDF下载

MC908MR32CFUE图片预览
型号: MC908MR32CFUE
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内容描述: [MC908MR32CFUE ]
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文件页数/大小: 308 页 / 4411 K
品牌: FREESCALE [ Freescale ]
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Timer Interface B (TIMB)  
Clearing the toggle-on-overflow bit, TOVx, inhibits output toggles on TIMB  
overflows. Subsequent output compares try to force the output to a state it is  
already in and have no effect. The result is a 0 percent duty cycle output.  
Setting the channel x maximum duty cycle bit (CHxMAX) and setting the TOVx bit  
generates a 100 percent duty cycle output. (See 17.7.4 TIMB Channel Status and  
Control Registers.)  
17.4 Interrupts  
These TIMB sources can generate interrupt requests:  
TIMB overflow flag (TOF) — The timer overflow flag (TOF) bit is set when  
the TIMB counter reaches the modulo value programmed in the TIMB  
counter modulo registers. The TIMB overflow interrupt enable bit, TOIE,  
enables TIMB overflow interrupt requests. TOF and TOIE are in the TIMB  
status and control registers.  
TIMB channel flags (CH1F–CH0F) — The CHxF bit is set when an input  
capture or output compare occurs on channel x. Channel x TIMB CPU  
interrupt requests are controlled by the channel x interrupt enable bit,  
CHxIE.  
17.5 Wait Mode  
The WAIT instruction puts the MCU in low-power standby mode.  
The TIMB remains active after the execution of a WAIT instruction. In wait mode,  
the TIMB registers are not accessible by the CPU. Any enabled CPU interrupt  
request from the TIMB can bring the MCU out of wait mode.  
If TIMB functions are not required during wait mode, reduce power consumption by  
stopping the TIMB before executing the WAIT instruction.  
17.6 I/O Signals  
Port E shares three of its pins with the TIMB:  
PTE0/TCLKB is an external clock input to the TIMB prescaler.  
The two TIMB channel I/O pins are PTE1/TCH0B and PTE2/TCH1B.  
17.6.1 TIMB Clock Pin (PTE0/TCLKB)  
PTE0/TCLKB is an external clock input that can be the clock source for the TIMB  
counter instead of the prescaled internal bus clock. Select the PTE0/TCLKB input  
by writing 1s to the three prescaler select bits, PS[2:0]. See 17.7.1 TIMB Status  
and Control Register.  
The maximum TCLK frequency is the least: 4 MHz or bus frequency ÷ 2.  
Data Sheet  
264  
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0  
Timer Interface B (TIMB)  
MOTOROLA  
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