Timer Interface B (TIMB)
17.7.3 TIMB Counter Modulo Registers
The read/write TIMB modulo registers contain the modulo value for the TIMB
counter. When the TIMB counter reaches the modulo value, the overflow flag
(TOF) becomes set, and the TIMB counter resumes counting from $0000 at the
next timer clock. Writing to the high byte (TBMODH) inhibits the TOF bit and
overflow interrupts until the low byte (TBMODL) is written. Reset sets the TIMB
counter modulo registers.
Register Name and Address:
Bit 7
TBMODH — $0054
6
Bit 14
1
5
Bit 13
1
4
Bit 12
1
3
Bit 11
1
2
Bit 10
1
1
Bit 9
1
Bit 0
Bit 8
1
Read:
Bit 15
Write:
Reset:
1
Register Name and Address:
Bit 7
TBMODL — $0055
6
Bit 6
1
5
Bit 5
1
4
3
Bit 3
1
2
Bit 2
1
1
Bit 1
1
Bit 0
Bit 0
1
Read:
Bit 7
Write:
Bit 4
1
Reset:
1
Figure 17-7. TIMB Counter Modulo Registers
(TBMODH and TBMODL)
NOTE:
Reset the TIMB counter before writing to the TIMB counter modulo registers.
17.7.4 TIMB Channel Status and Control Registers
Each of the TIMB channel status and control registers:
•
•
•
•
•
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture
trigger
•
•
•
Selects output toggling on TIMB overflow
Selects 0 percent and 100 percent PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Data Sheet
268
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
Timer Interface B (TIMB)
MOTOROLA