Timer Interface B (TIMB)
Functional Description
active channel to prevent writing a new value to the active channel. Writing to the
active channel registers is the same as generating unbuffered output compares.
17.3.4 Pulse-Width Modulation (PWM)
By using the toggle-on-overflow feature with an output compare channel, the TIMB
can generate a PWM signal. The value in the TIMB counter modulo registers
determines the period of the PWM signal. The channel pin toggles when the
counter reaches the value in the TIMB counter modulo registers. The time between
overflows is the period of the PWM signal.
As Figure 17-4 shows, the output compare value in the TIMB channel registers
determines the pulse width of the PWM signal. The time between overflow and
output compare is the pulse width. Program the TIMB to clear the channel pin on
output compare if the polarity of the PWM pulse is 1 (ELSxA = 0). Program the
TIMB to set the pin if the polarity of the PWM pulse is 0 (ELSxA = 1).
OVERFLOW
OVERFLOW
OVERFLOW
PERIOD
POLARITY = 1
(ELSxA = 0)
TCHx
TCHx
PULSE
WIDTH
POLARITY = 0
(ELSxA = 1)
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 17-4. PWM Period and Pulse Width
The value in the TIMB counter modulo registers and the selected prescaler output
determines the frequency of the PWM output. The frequency of an 8-bit PWM
signal is variable in 256 increments. Writing $00FF (255) to the TIMB counter
modulo registers produces a PWM period of 256 times the internal bus clock period
if the prescaler select value is $000 (see 17.7.1 TIMB Status and Control
Register).
The value in the TIMB channel registers determines the pulse width of the PWM
output. The pulse width of an 8-bit PWM signal is variable in 256 increments.
Writing $0080 (128) to the TIMB channel registers produces a duty cycle of
128/256 or 50 percent.
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
MOTOROLA Timer Interface B (TIMB)
Data Sheet
261
FREESCALE [ Freescale ]
