Timer Interface B (TIMB)
Functional Description
TCLK
PTE0/TCLKB
INTERNAL
BUS CLOCK
PRESCALER SELECT
PRESCALER
TSTOP
TRST
PS2
PS1
PS0
16-BIT COUNTER
INTER-
RUPT
LOGIC
TOF
TOIE
16-BIT COMPARATOR
TMODH:TMODL
ELS0B
ELS0A
CHANNEL 0
16-BIT COMPARATOR
TCH0H:TCH0L
TOV0
CH0MAX
PTE1
LOGIC
PTE1/TCH0B
CH0F
MS0B
INTER-
RUPT
LOGIC
16-BIT LATCH
CH0IE
MS0A
ELS1B ELS1A
CHANNEL 1
16-BIT COMPARATOR
TCH1H:TCH1L
TOV1
CH1MAX
PTE2
LOGIC
PTE2/TCH1B
CH1F
INTER-
RUPT
LOGIC
16-BIT LATCH
CH1IE
MS1A
Figure 17-2. TIMB Block Diagram
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read: TOF
0
TRST
0
0
R
TIMB Status/Control Register
TOIE
TSTOP
PS2
PS1
PS0
$0051
(TBSC) Write:
0
0
See page 265.
TIMB Counter Register High
See page 267.
Reset:
0
Bit 14
R
1
Bit 13
R
0
0
Bit 10
R
0
Bit 9
R
0
Bit 8
R
Read: Bit 15
Bit 12
R
Bit 11
R
$0052
$0053
$0054
(TBCNTH) Write:
R
0
Reset:
0
0
0
0
0
0
0
Read: Bit 7
Bit 6
R
Bit 5
R
Bit 4
R
Bit 3
R
Bit 2
R
Bit 1
R
Bit 0
R
TIMB Counter Register Low
See page 267.
(TBCNTL) Write:
R
0
Reset:
Read:
0
0
0
0
0
0
0
TIMB Counter Modulo Register
Bit 15
Bit 14
Bit 13
1
Bit 12
1
Bit 11
1
Bit 10
1
Bit 9
1
Bit 8
1
High (TBMODH) Write:
See page 268.
Reset:
1
1
R
= Reserved
Figure 17-3. TIMB I/O Register Summary
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
MOTOROLA
Data Sheet
257
Timer Interface B (TIMB)
FREESCALE [ Freescale ]
