Timer Interface A (TIMA)
16.7.3 TIMA Counter Modulo Registers
The read/write TIMA modulo registers contain the modulo value for the TIMA
counter. When the TIMA counter reaches the modulo value, the overflow flag
(TOF) becomes set, and the TIMA counter resumes counting from $0000 at the
next timer clock. Writing to the high byte (TAMODH) inhibits the TOF bit and
overflow interrupts until the low byte (TAMODL) is written. Reset sets the TIMA
counter modulo registers.
Register Name and Address:
Bit 7
TAMODH — $0011
6
Bit 14
1
5
Bit 13
1
4
Bit 12
1
3
Bit 11
1
2
Bit 10
1
1
Bit 9
1
Bit 0
Bit 8
1
Read:
Bit 15
Write:
Reset:
1
Register Name and Address:
Bit 7
TAMODL — $0012
6
Bit 6
1
5
Bit 5
1
4
3
Bit 3
1
2
Bit 2
1
1
Bit 1
1
Bit 0
Bit 0
1
Read:
Bit 7
Write:
Bit 4
1
Reset:
1
Figure 16-7. TIMA Counter Modulo Registers
(TAMODH and TAMODL)
NOTE:
Reset the TIMA counter before writing to the TIMA counter modulo registers.
16.7.4 TIMA Channel Status and Control Registers
Each of the TIMA channel status and control registers:
•
•
•
•
•
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture
trigger
•
•
•
Selects output toggling on TIMA overflow
Selects 0 percent and 100 percent PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Data Sheet
248
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
Timer Interface A (TIMA)
MOTOROLA
FREESCALE [ Freescale ]
