Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
On-chip memory
Table 3-2. Register and control bit assignments (Sheet 3 of 4)
State
bit 0
Register name
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
on reset
reserved
reserved
$0040
$0041
$0042
$0043
$0044
$0045
$0046
$0047
$0048
$0049
$004A
$004B
$004C
$004D
$004E
$004F
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
SCI/MI 2/3 baud high (S2BDH)
SCI/MI 2/3 baud low (S2BDL)
SCI/MI 2 control 1 (S2CR1)
SCI/MI 2 control 2 (S2CR2)
SCI/MI 2 status 1 (S2SR1)
SCI/MI 2 status 2 (S2SR2)
SCI/MI 2 data high (S2DRH)
SCI/MI 2 data low (S2DRL)
reserved
$0050 B2TST B2SPL
0
S2B12 S2B11 S2B10 S2B9 S2B8 0000 0000
$0051 S2B7 S2B6 S2B5 S2B4 S2B3 S2B2 S2B1 S2B0 0000 0100
$0052 LOPS2 WOMS2 MIE2 M2 WAKE2 ILT2 PE2 PT2 0000 0000
$0053 TIE2 TCIE2 RIE2 ILIE2 TE2 RE2 RWU2 SBK2 0000 0000
$0054 TDRE2 TC2 RDRF2 IDLE2 OR2
NF2
0
FE2
0
PF2 1100 0000
RAF2 0000 0000
$0055
$0056
0
0
0
0
0
0
0
0
R8B
T8B
0
0
0
undefined
$0057 R7T7B R6T6B R5T5B R4T4B R3T3B R2T2B R1T1B R0T0B undefined
$0058
$0059
reserved
SCI/MI 3 control 1 (S3CR1)
SCI/MI 3 control 2 (S3CR2)
SCI/MI 3 status 1 (S3SR1)
SCI/MI 3 status 2 (S3SR2)
SCI/MI 3 data high (S3DRH)
SCI/MI 3 data low (S3DRL)
Pulse width clock select (PWCLK)
$005A LOPS3 WOMS3 MIE3
$005B TIE3 TCIE3 RIE3 ILIE3
$005C TDRE3 TC3 RDRF3 IDLE3 OR3
M3 WAKE3 ILT3
PE3
PT3 0000 0000
TE3 RE3 RWU3 SBK3 0000 0000
NF3
0
FE3
0
PF3 1100 0000
RAF3 0000 0000
$005D
$005E
0
0
0
0
0
0
0
0
R8C
T8C
0
0
0
undefined
$005F R7T7C R6T6C R5T5C R4T4C R3T3C R2T2C R1T1C R0T0C undefined
$0060 CON34 CON12 PCKA2 PCKA1 PCKB3 PCKB2 PCKB1 0000 0000
0
Pulse width polarity select (PWPOL) $0061 PCLK4 PCLK3 PCLK2 PCLK1 PPOL4 PPOL3 PPOL2 PPOL1 0000 0000
Pulse width scale (PWSCAL)
$0062 (bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 0000 0000
MC68HC11P2 — Rev 1.0
Technical Data
Operating Modes and On-Chip Memory
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