Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
stand-by power input (VSTBY), which allows the RAM contents to be
maintained in the absence of VDD.
Refer to Table 3-4, which is a summary of mode pin operation, the mode
control bits and the four operating modes.
A normal mode is selected when MODB is logic one during reset. One
of three reset vectors is fetched from address $FFFA–$FFFF, and
program execution begins from the address indicated by this vector. If
MODB is logic zero during reset, the special mode reset vector is fetched
from addresses $BFFA–$BFFF and software has access to special test
features. Refer to Resets and Interrupts.
3.5.1.1 HPRIO — Highest priority I-bit interrupt & misc. register
State
on reset
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
RBOO
Highest priority interrupt (HPRIO) $003C
SMOD MDA PSEL4 PSEL3 PSEL2 PSEL1 PSEL0 xxx0 0110
T
NOTE: RBOOT, SMOD and MDA bits depend on the power-up initialization
mode and can only be written in special modes when SMOD = 1. Refer
to Table 3-4.
RBOOT — Read bootstrap ROM
1 = Bootloader ROM enabled, at $BE40–$BFFF.
0 = Bootloader ROM disabled and not in map.
SMOD — Special mode select
1 = Special mode variation in effect.
0 = Normal mode variation in effect.
Once cleared, cannot be set again.
MDA — Mode select A
1 = Normal expanded or special test mode. (Expanded buses
active.)
0 = Normal single chip or special bootstrap mode. (Ports active.)
Technical Data
MC68HC11P2 — Rev 1.0
Operating Modes and On-Chip Memory
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