Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
On-chip memory
registers are both mapped to the same 4k boundary, RAM starts at
$x080 and 128 bytes are remapped at $x400–$x47F. Otherwise, RAM
starts at $x000.
Remapping is accomplished by writing appropriate values into the two
nibbles of the INIT register.
The 640-byte EEPROM is initially located at $0D80 after reset when
EEPROM is enabled in the memory map by the CONFIG register.
EEPROM can be placed at any other 4k boundary ($xD80) by writing to
the INIT2 register.
If ROM is available, the ROMAD and ROMON bits in the CONFIG
register control the position and presence of ROM in the memory map.
In special test mode, the ROMON bit is cleared so the ROM is removed
from the memory map. In single chip mode, the ROMAD bit is set to one
after reset, which enables the ROM at $8000–$FFFF. In expanded
mode, the ROM may be enabled from $0000–7FFF (ROMAD = 0) to
allow an external memory to contain the interrupt vectors and
initialization code.
In special bootstrap mode, a bootloader ROM is enabled at locations
$BE40–$BFFF. The vectors for special bootstrap mode are contained in
the bootloader program. The boot ROM occupies a 512 byte block of the
memory map, though not all locations are used.
3.4.1.1 RAM
The MC68HC11P2 has 1024 bytes of fully static RAM that are used for
storing instructions, variables and temporary data during program
execution. RAM can be placed at any 4k boundary in the 64kbyte
address space by writing an appropriate value to the INIT register.
By default, RAM is initially located at $0080 in the memory map. Direct
addressing mode can access the first 128 locations of RAM using a one-
byte address operand. Direct mode accesses save program memory
space and execution time. Registers can be moved to other boundaries
to allow 256 bytes of RAM to be located in direct addressing space.
MC68HC11P2 — Rev 1.0
Technical Data
Operating Modes and On-Chip Memory
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