Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
Table 3-2. Register and control bit assignments (Sheet 4 of 4)
State
on reset
Register name
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Pulse width count 2 (PWCNT2)
Pulse width count 3 (PWCNT3)
Pulse width count 4 (PWCNT4)
Pulse width period 1 (PWPER1)
Pulse width period 2 (PWPER2)
Pulse width period 3 (PWPER3)
Pulse width period 4 (PWPER4)
Pulse width duty 1 (PWDTY1)
Pulse width duty 2 (PWDTY2)
Pulse width duty 3 (PWDTY3)
Pulse width duty 4 (PWDTY4)
SCI 1 baud rate high (SCBDH)
SCI 1 baud rate low (SCBDL)
SCI 1 control 1 (SCCR1)
SCI 1 control 2 (SCCR2)
SCI 1 status 1 (SCSR1)
SCI 1 status 2 (SCSR2)
SCI 1 data high (SCDRH)
SCI 1 data low (SCDRL)
reserved
$0065 (bit 7)
$0066 (bit 7)
$0067 (bit 7)
$0068 (bit 7)
$0069 (bit 7)
$006A (bit 7)
$006B (bit 7)
$006C (bit 7)
$006D (bit 7)
$006E (bit 7)
$006F (bit 7)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
0
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(bit 0) 0000 0000
(bit 0) 0000 0000
(bit 0) 0000 0000
(bit 0) 1111 1111
(bit 0) 1111 1111
(bit 0) 1111 1111
(bit 0) 1111 1111
(bit 0) 1111 1111
(bit 0) 1111 1111
(bit 0) 1111 1111
(bit 0) 1111 1111
$0070 BTST BSPL
SBR12 SBR11 SBR10 SBR9 SBR8 0000 0000
$0071 SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0 0000 0100
$0072 LOOPS WOMS
0
M
WAKE
TE
OR
0
ILT
RE
NF
0
PE
RWU
FE
0
PT
SBK 0000 0000
PF 1100 0000
RAF 0000 0000
undefined
0000 0000
$0073
TIE
TCIE
TC
0
RIE
ILIE
$0074 TDRE
RDRF IDLE
$0075
$0076
0
0
0
0
0
R8
T8
0
0
0
0
$0077 R7T7 R6T6 R5T5 R4T4 R3T3 R2T2 R1T1 R0T0 undefined
$0078
$0079
$007A
$007B
reserved
reserved
reserved
Port H data (PORTH)
$007C
$007D DDH7 DDH6 DDH5 DDH4 DDH3 DDH2 DDH1 DDH0 0000 0000
$007E PG7 PG6 PG5 PG4 PG3 PG2 PG1 PG0 undefined
$007F DDG7 DDG6 DDG5 DDG4 DDG3 DDG2 DDG1 DDG0 0000 0000
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0 undefined
Data direction H (DDRH)
Port G data (PORTG)
Data direction G (DDRG)
KEY
‡
Applies only to EPROM devices
x State on reset depends on mode selected
u State of bit on reset is undefined
Technical Data
MC68HC11P2 — Rev 1.0
Operating Modes and On-Chip Memory
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
