Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
The on-chip RAM is a fully static memory. RAM contents can be
preserved during periods of processor inactivity by either of two
methods, both of which reduce power consumption:
1. During the software-based STOP mode, MCU clocks are stopped,
but the MCU continues to draw power from VDD. Power supply
current is directly related to operating frequency in CMOS
integrated circuits and there is very little leakage when the clocks
are stopped. These two factors reduce power consumption while
the MCU is in STOP mode.
2. To reduce power consumption to a minimum, VDD can be turned
off, and the MODB/VSTBY pin can be used to supply RAM power
from either a battery back-up or a second power supply. Although
this method requires external hardware, it is very effective. Refer
to Pin Descriptions for information about how to connect the
stand-by RAM power supply and to Resets and Interrupts for a
description of low power operation.
3.4.1.2 ROM and EPROM
The MC68HC11P2 MCU has 32kbytes of ROM/EPROM. The
ROM/EPROM array is enabled when the ROMON bit in the CONFIG
register is set to one (erased). The ROMAD bit in CONFIG places the
ROM/EPROM at either $8000–$FFFF out of reset (ROMAD = 1) or at
$0000–$7FFF (ROMAD = 0) in expanded mode.
3.4.1.3 Bootloader ROM
The bootloader ROM is enabled at address $BE40–$BFFF during
special bootstrap mode. The reset vector is fetched from this ROM and
the MCU executes the bootloader firmware. In normal modes, the
bootloader ROM is disabled.
Technical Data
MC68HC11P2 — Rev 1.0
Operating Modes and On-Chip Memory
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