Signal Pins
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
State
During
Reset
Signal
Name
Pin
No.
Ball No.
Type
Signal Description
D0
70
P10
Input/
Output
In reset, Data Bus — D0 - D6 specify part of the data for external program or
output is data memory accesses.
disabled,
pull-up is Depending upon the state of the DRV bit in the EMI bus control
enabled
register (BCR), D0–D6 are tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead
of using the default setting.
(GPIOF9)
Input/
Output
Port F GPIO — These seven GPIO pins can be individually
programmed as input or output pins.
D1
(GPIOF10)
71
83
86
88
89
90
N10
P14
L13
L14
L12
L11
After reset, these pins default to the EMI Data Bus function.
D2
(GPIOF11)
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
D3
(GPIOF12)
Example: GPIOF9, clear bit 9 in the GPIOF_PUR register.
D4
(GPIOF13)
D5
(GPIOF14)
D6
(GPIOF15)
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
23
FREESCALE [ Freescale ]
