Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
State
During
Reset
Signal
Name
Pin
No.
Ball No.
Type
Signal Description
GPIOD0
(CS2)
55
P6
Input/
Output
Input,
pull-up
enabled
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
Output
Chip Select — CS2 may be programmed within the EMI module
to act as a chip select for specific areas of the external memory
map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS2 is tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
(CAN2_TX)
Open
Drain
Output
FlexCAN2 Transmit Data — CAN output.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 0 in the GPIO_D_PER register. Then
change bit 4 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOD_PUR register.
GPIOD1
(CS3)
56
L6
Schmitt
Input/
Output
Input,
pull-up
enabled
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
Output
Chip Select — CS3 may be programmed within the EMI module
to act as a chip select for specific areas of the external memory
map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS3 is tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead
of using the default setting.
(CAN2_RX)
Schmitt
Input
FlexCAN2 Receive Data — This is the CAN input. This pin has
an internal pull-up resistor.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 1 in the GPIO_D_PER register. Then
change bit 5 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOD_PUR register.
56F8367 Technical Data, Rev. 9
26
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
