Program Map
1
Table 4-2 Interrupt Vector Table Contents (Continued)
Vector
Number
Priority
Level
Vector Base
Address +
Peripheral
Interrupt Function
Timer
Timer
ADC
38
0-2
P:$4C
P:$4E
P:$50
P:$52
P:$54
P:$56
P:$58
P:$5A
Timer Channel 2
Timer Channel 3
39
40
41
42
43
44
45
0-2
0-2
0-2
0-2
0-2
0-2
-1
ADCA Conversion Complete
ADCB Conversion Complete
ADC Zero Crossing or Limit Error
Reload PWM
ADC
ADC
PWM
PWM
SWILP
PWM Fault
SW Interrupt Low Priority
1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced
from the vector table, providing only 19 bits of address.
2. If the VBA is set to $0000, the first two locations of the vector table will overlay the chip reset addresses.
4.3 Program Map
The Program Memory map is shown in Table 4-3.
1
Table 4-3 Program Memory Map
Begin/End Address
Memory Allocation
P: $FF FFFF
P: $00 8800
RESERVED
On-Chip RAM2
4KB
P: $00 87FF
P: $00 8000
P: $00 7FFF
P: $00 2000
RESERVED
P: $00 1FFF
P: $00 0000
Internal Program Flash
16KB
Cop Reset Address = $00 0002
Boot Location = $00 0000
1. All addresses are 16-bit Word addresses.
2. This RAM is shared with Data space starting at address X: $00 0000;
see Figure 4-1.
56F8014 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
31
FREESCALE [ Freescale ]
