Operating Modes
The 56F801X family parts’ on-chip clock synthesis module has the following registers:
•
•
•
•
•
Control Register (OCCS_CR)
Divide-by Register (OCCS_DB)
Status Register (OCCS_SR)
Shutdown Register (OCCS_SHUTDN)
Oscillator Control Register (OCCS_OCTRL)
For more information on these registers, please refer to the 56F801X Peripheral Reference Manual.
3.3.1
External Clock Source
The recommended method of connecting an external clock is illustrated in Figure 3-1. The external clock
source is connected to GPIOB6 / RXD.
56F8014
GPIOB6 / RXD
External Clock
Figure 3-1 Connecting an External Clock Signal using GPIOB6 / RXD
56F8014 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
27
FREESCALE [ Freescale ]
