F81867
Port 80 Base Address Low Byte Register ⎯ Offset 11h
Bit
Name
R/W Reset Default
Description
7-0
P80_BASE_L
R/W 5VSB 0x00 The 80 port base address low byte.
7.20.7
Embedded Flash Control (base address 0x1F00, 256 byte)
Control Register1 ⎯ Offset 01h
Bit
7
Name
START_CMD
Reserved
R/W Reset
Default
Description
W
-
-
-
-
Write 1 to this bit will start a single byte read or single byte write command
6-2
1
-
Reserved
IFREN
R/W
R/W
5VSB
5VSB
0
0
Reserved.
0
FLASH_CMD
0: Read , 1:Write
Status Register ⎯ Offset 02h
Bit
7-3
1
Name
Reserved
R/W Reset
Default
Description
Reserved
-
-
-
TIMEOUT_STS
CMD_BUSY
R
R
5VSB
5VSB
0
0
This bit indicates that a single byte write command is timeout and failed.
This bit indicates the command is still progressing.
0
Control Register2 ⎯ Offset 03h
Bit
Name
R/W Reset
R/W 5VSB
Default
Description
7-0
ADR_L
0
{ADR_H, ADR_L} is 13-bits address for embedded flash
Control Register3 ⎯ Offset 04h
Bit
Name
R/W Reset
Default
Description
7-5
4-0
Reserved
ADR_H
-
-
-
Reserved
R/W
5VSB
0
{ADR_H, ADR_L} is 13-bits address for embedded flash
Control Register4 ⎯ Offset 05h
Bit
Name
R/W Reset
R/W 5VSB
Default
Description
7-0
WR_DATA
0
This byte is data for single byte write command.
Control Register5 ⎯ Offset 06h
Bit
Name
R/W Reset
5VSB
Default
Description
7-0
RD_DATA
R
0
This byte is stores data read by a single byte read command.
216
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
